參數(shù)資料
型號(hào)： AD7666ASTZRL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 19/28頁(yè)
文件大小： 0K
描述： IC ADC 16BIT UNIPOLAR 48LQFP
標(biāo)準(zhǔn)包裝： 2,000
系列： PulSAR®
位數(shù)： 16
采樣率（每秒）： 500k
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 75mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個(gè)偽差分，單極
配用： EVAL-AD7666CBZ-ND - BOARD EVALUATION FOR AD7666
AD7666
Rev. 0 | Page 26 of 28
MICROPROCESSOR INTERFACING
The AD7666 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and for ac signal
processing applications interfacing to a digital signal processor.
The AD7666 is designed to interface either with a parallel 8-bit
or 16-bit wide interface, or with a general-purpose serial port or
I/O ports on a microcontroller. A variety of external buffers can
be used with the AD7666 to prevent digital noise from coupling
into the ADC. The following section discusses the use of an
AD7666 with an ADSP-219x SPI equipped DSP.
SPI Interface (ADSP-219x)
Figure 44 shows an interface diagram between the AD7666 and
the SPI equipped ADSP-219x. To accommodate the slower
speed of the DSP, the AD7666 acts as a slave device and data
must be read after conversion. This mode also allows the daisy-
chain feature. The convert command can be initiated in
response to an internal timer interrupt. The reading process can
be initiated in response to the end-of-conversion signal (BUSY
going LOW) using an interrupt line of the DSP. The serial inter-
face (SPI) on the ADSP-219x is configured for master mode—
(MSTR) = 1, Clock Polarity bit (CPOL) = 0, Clock Phase bit
(CPHA) = 1, and SPI Interrupt Enable (TIMOD) = 00—by
writing to the SPI control register (SPICLTx). To meet all timing
requirements, the SPI clock should be limited to 17 Mbps,
which allows it to read an ADC result in less than 1 s. When a
higher sampling rate is desired, use of one of the parallel
interface modes is recommended.
AD7666*
ADSP-219x*
SER/PAR
PFx
MISOx
SCKx
PFx or TFSx
BUSY
SDOUT
SCLK
CNVST
EXT/INT
CS
RD
INVSCLK
DVDD
* ADDITIONAL PINS OMITTED FOR CLARITY
SPIxSEL (PFx)
03034-0-037
Figure 44. Interfacing the AD7666 to an SPI Interface
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