參數(shù)資料
型號: AD7699BCPZRL7
廠商: Analog Devices Inc
文件頁數(shù): 11/28頁
文件大?。?/td> 0K
描述: IC ADC 8CH 16BIT 500KSPS 20LFCSP
標準包裝: 1,500
位數(shù): 16
采樣率(每秒): 500k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
功率耗散(最大): 32mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-VFQFN 裸露焊盤,CSP
供應商設備封裝: 20-LFCSP-VQ
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個單端,單極;4 個差分,單極;4 個差分,雙極;4 個偽差分,雙極
Data Sheet
AD7699
Rev.
| Page 19 of 28
75
70
65
60
55
50
45
40
35
30
1
10k
10
PS
SR
(
d
B
)
100
1k
FREQUENCY (kHz)
07
35
4-
03
0
Reference Decoupling
Whether using an internal or external reference, the AD7699
voltage reference output/input, REF, has a dynamic input
impedance and should therefore be driven by a low impedance
source with efficient decoupling between the REF and GND
pins. This decoupling depends on the choice of the voltage
reference but usually consists of a low ESR capacitor connected
to REF and GND with minimum parasitic inductance. A 10 μF
(X5R, 1206 size) ceramic chip capacitor is appropriate when using
the internal reference, the ADR43x/ADR44x external reference,
or a low impedance buffer such as the AD8031 or the AD8605.
The placement of the reference decoupling capacitor is also
important to the performance of the AD7699, as explained in the
Layout section. Mount the decoupling capacitor on the same side as
the ADC at the REF pin with a thick PCB trace. The GND should
also connect to the reference decoupling capacitor with the shortest
distance and to the analog ground plane with several vias.
Figure 32. PSRR vs. Frequency
The AD7699 powers down automatically at the end of each
conversion phase; therefore, the operating currents and power
scale linearly with the sampling rate. This makes the part ideal
for low sampling rates (even of a few hertz) and low battery-
powered applications.
If desired, smaller reference decoupling capacitor values down
to 2.2 μF can be used with a minimal impact on performance,
especially on DNL.
10,000
1000
100
10
1
0.1
0.010
0.001
10
1M
100
O
P
E
RAT
IN
G
CU
RRE
N
T
(
A
)
1k
10k
100k
SAMPLING RATE (sps)
0
73
54
-03
1
VDD = 5V, INTERNAL REF
VDD = 5V, EXTERNAL REF
VIO
Regardless, there is no need for an additional lower value ceramic
decoupling capacitor (for example, 100 nF) between the REF
and GND pins.
For applications that use multiple AD7699s or other PulSAR
devices, it is more effective to use the internal reference buffer
to buffer the external reference voltage, thus reducing SAR
conversion crosstalk.
The voltage reference temperature coefficient (TC) directly
impacts full scale; therefore, in applications where full-scale
accuracy matters, care must be taken with the TC. For instance,
a ±15 ppm/°C TC of the reference changes full scale by ±1 LSB/°C.
Figure 33. Operating Currents vs. Sampling Rate
POWER SUPPLY
SUPPLYING THE ADC FROM THE REFERENCE
The AD7699 uses two power supply pins: an analog and digital
core supply (VDD) and a digital input/output interface supply
(VIO). VIO allows direct interface with any logic between 1.8 V
and VDD. To reduce the supplies needed, the VIO and VDD pins
can be tied together. The AD7699 is independent of power supply
sequencing between VIO and VDD. The only restriction is that
CNV must be low when powering up the AD7699. Additionally,
it is very insensitive to power supply variations over a wide
frequency range, as shown in Figure 32.
For simplified applications, the AD7699, with its low operating
current, can be supplied directly using the reference circuit, as
shown in Figure 34. The reference line can be driven by
The system power supply directly
A reference voltage with enough current output capability,
such as the ADR43x/ADR44x
A reference buffer, such as the AD8605, which can also
filter the system power supply, as shown in Figure 34
AD8605
AD7699
VIO
REF
VDD
10F
1F
0.1F
10
10k
5V
1F
1
1OPTIONAL REFERENCE BUFFER AND FILTER.
0.1F
07
35
4-
0
32
Figure 34. Example of an Application Circuit
B
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