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參數(shù)資料
| 型號： | AD7703AN |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 20BIT LC2MOS 20-DIP |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 位數(shù)： | 20 |
| 采樣率（每秒）： | 4k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 37mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 20-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個單端，單極；1 個單端，雙極 |
REV. E
–8–
AD7703
DIGITAL FILTERING
The AD7703’s digital filter behaves like an analog filter, with a
few minor differences.
First, since digital filtering occurs after the analog-to-digital
conversion, it can remove noise injected during the conversion
process. Analog filtering cannot do this.
On the other hand, analog filtering can remove noise superim-
posed on the analog signal before it reaches the ADC. Digital
filtering cannot do this and noise peaks riding on signals near
full scale have the potential to saturate the analog modulator and
digital filter, even though the average value of the signal is within
limits. To alleviate this problem, the AD7703 has overrange
headroom built into the
-
modulator and digital filter that
allows overrange excursions of 100 mV. If noise signals are larger
than this, consideration should be given to analog input filtering,
or to reducing the gain in the input channel so that a full-scale
input (2.5 V) gives only a half-scale input to the AD7703 (1.25 V).
This will provide an overrange capability greater than 100% at
the expense of reducing the dynamic range by one bit (50%).
FILTER CHARACTERISTICS
The cutoff frequency of the digital filter is fCLK/409600. At the
maximum clock frequency of 4.096 MHz, the cutoff frequency
of the filter is 10 Hz and the data update rate is 4 kHz.
Figure 9 shows the filter frequency response. This is a six-pole
Gaussian response that provides 55 dB of 60 Hz rejection for a
10 Hz cutoff frequency. If the clock frequency is halved to give a
5 Hz cutoff, 60 Hz rejection is better than 90 dB.
1
10
100
FREQUENCY – Hz
20
0
–20
–40
–60
–80
–100
–120
–140
–160
GAIN
–
dB
f
CLK = 1MHz
f
CLK = 2MHz
f
CLK = 4MHz
Figure 9. Frequency Response of AD7703 Filter
Since the AD7703 contains this low-pass filtering, there is a
settling time associated with step function inputs, and data will
be invalid after a step change until the settling time has elapsed.
The AD7703 is, therefore, unsuitable for high speed multiplex-
ing, where channels are switched and converted sequentially at
high rates, as switching between channels can cause a step change
in the input. However, slow multiplexing of the AD7703 is
possible, provided that the settling time is allowed to elapse
before data for the new channel is accessed.
The output settling of the AD7703 in response to a step input
change is shown in Figure 10. The Gaussian response has fast
settling with no overshoot, and the worst-case settling time to
±0.0007% is 125 ms with a 4.096 MHz master clock frequency.
PERCENT
OF
FINAL
V
ALUE
100
80
60
40
20
0
040
80
120
160
TIME – ms
Figure 10. AD7703 Step Response
USING THE AD7703
SYSTEM DESIGN CONSIDERATIONS
The AD7703 operates differently from successive approximation
ADCs or integrating ADCs. Since it samples the signal continu-
ously, like a tracking ADC, there is no need for a start convert
command. The 20-bit output register is updated at a 4 kHz rate,
and the output can be read at any time, either synchronously or
asynchronously.
CLOCKING
The AD7703 requires a master clock input, which may be an exter-
nal TTL/CMOS compatible clock signal applied to the CLKIN
pin (CLKOUT not used). Alternatively, a crystal of the correct
frequency can be connected between CLKIN and CLKOUT,
when the clock circuit will function as a crystal controlled oscillator.
Figure 11 shows a simple model of the on-chip gate oscillator
and Table II gives some typical capacitor values to be used with
various resonators.
AD7703
C2*
C1*
R1
5M
X1
3
10pF
gm = 1500 MHO
*SEE TABLE II
2
Figure 11. On-Chip Gate Oscillator
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參數(shù)描述 |
|---|---|
| AD7703ANZ | 功能描述:IC ADC 20BIT LC2MOS MONO 20DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7703AQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD7703AR | 功能描述:IC ADC 20BIT LC2MOS 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7703AR-REEL | 功能描述:IC ADC 20BIT LC2MOS MONO 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7703ARZ | 功能描述:IC ADC 20BIT LC2MOS 20-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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