參數(shù)資料
型號(hào): AD7739BRU-REEL7
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 8-Channel, High Throughput, 24-Bit Sigma-Delta ADC
中文描述: 8-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24
封裝: MS-153AD, TSSOP-24
文件頁數(shù): 17/32頁
文件大?。?/td> 380K
代理商: AD7739BRU-REEL7
AD7739
ADC STATUS REGISTER
8 Bits, Read-Only Register, Address 0x04, Default Value 0x00
Rev. 0 | Page 17 of 32
In conversion modes, the register bits reflect the individual channel status. When a conversion is complete, the corresponding channel
data register is updated and the corresponding RDY bit is set to 1. When the channel data register is read, the corresponding bit is reset
to 0. The bit is reset to 0 also when no read operation has taken place and the result of the next conversion is being updated to the channel
data register. Writing to the mode register resets all the bits to 0.
In calibration modes, all the register bits are reset to 0 while a calibration is in progress; all the register bits are set to 1 when the
calibration is complete.
The RDY pin output is related to the content of the ADC status register as defined by the RDYFN bit in the I/O port register. The RDY0
bit corresponds to Channel 0, the RDY1 bit corresponds to Channel 1, and so on.
Bit
Mnemonic
Default
Bit 7
RDY7
0
Bit 6
RDY6
0
Bit 5
RDY5
0
Bit 4
RDY4
0
Bit 3
RDY3
0
Bit 2
RDY2
0
Bit 1
RDY1
0
Bit 0
RDY0
0
CHECKSUM REGISTER
16 Bits, Read/Write Register, Address 0x05
This register is described in the
Using the AD7732/AD7734/
AD7738/AD7739 Checksum Register
application note
www.analog.com/UploadedFiles/Application_Notes/71751876
).
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