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| 型號： | AD7739BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 8-Channel, High Throughput, 24-Bit Sigma-Delta ADC |
| 中文描述： | 8-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | MS-153AD, TSSOP-24 |
| 文件頁數(shù)： | 22/32頁 |
| 文件大?。?/td> | 380K |
| 代理商： | AD7739BRU |
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AD7739
DIGITAL INTERFACE DESCRIPTION
HARDWARE
The AD7739 serial interface can be connected to the host device
via the serial interface in several different ways.
Rev. 0 | Page 22 of 32
The CS pin can be used to select the AD7739 as one of several
circuits connected to the host serial interface. When CS is high,
the AD7739 ignores the SCLK and DIN signals and the DOUT
pin goes to the high impedance state. When the CS signal is not
used, connect the CS pin to DGND.
The RDY pin can be polled for high-to-low transition or can
drive the host device interrupt input to indicate that the
AD7739 has finished the selected operation and/or new data
from the AD7739 is available. The host system can also wait a
designated time after a given command is written to the device
before reading. Alternatively, the AD7739 status can be polled.
When the RDY pin is not used in the system, it should be left as
an open circuit. (Note that the RDY pin is always an active
digital output, i.e., it never goes into a high impedance state.)
The RESET pin can be used to reset the AD7739. When not
used, connect this pin to DV
DD
.
The AD7739 interface can be reduced to just two wires
connecting the DIN and DOUT pins to a single bidirectional
data line. The second signal in this 2-wire configuration is the
SCLK signal. The host system should change the data line
direction with reference to the AD7739 timing specification
(see the Bus Relinquish Time in Table 2). The AD7739 cannot
operate in the continuous read mode in 2-wire serial interface
configuration.
All the digital interface inputs are Schmitt triggered; therefore,
the AD7739 interface features higher noise immunity and can
be easily isolated from the host system via optocouplers.
Figure 13, Figure 14, and Figure 15 outline some of the possible
host device interfaces: SPI without using the CS signal
(Figure 13), a DSP interface (Figure 14), and a 2-wire
configuration (Figure 15).
SCLK
DIN
DOUT
CS
RDY
RESET
DGND
DV
DD
DV
DD
AD7739
SCK
MOSI
MISO
INT
68HC11
SS
03742-0-013
Figure 13. AD7739 to Host Device Interface, SPI
SCLK
DIN
DOUT
CS
RDY
RESET
DV
DD
AD7739
SCLK
DT
DR
INT
TFS
RFS
ADSP-2105
03742-0-001
Figure 14. AD7739 to Host Device Interface, DSP
SCLK
DIN
DOUT
CS
RESET
DGND
DV
DD
AD7739
P3.1/TxD
P3.0/RxD
8xC51
03742-0-015
Figure 15. AD7739 to Host Device Interface, 2-Wire Configuration
DIN
SCLK
CS
DOUT
WRITE
COMMUNICATIONS
REGISTER
READ
ADC STATUS
REGISTER
03742-0-016
Figure 16. Serial Interface Signals—Registers Access
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