參數(shù)資料
型號(hào)： AD7789BRM
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： Low Power, 16-/24-Bit Sigma-Delta ADC
中文描述： 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
封裝： MO-187BA, MSOP-10
文件頁(yè)數(shù)： 1/20頁(yè)
文件大小： 288K
代理商： AD7789BRM
Low Power, 16-/24-Bit
Sigma-Delta ADC
AD7788/AD7789
FEATURES
AD7788: 16-bit resolution
AD7789: 24-bit resolution
Power
Supply: 2.5 V to 5.25 V operation
Normal: 75 μA maximum
Power-down: 1 μA maximum
RMS noise: 1.5 μV
AD7788: 16-bit p-p resolution
AD7789: 19-bit p-p resolution (21.5 bits effective)
Integral nonlinearity: 3.5 ppm typical
Simultaneous 50 Hz and 60 Hz rejection
Internal clock oscillator
V
DD
monitor channel
10-lead MSOP
INTERFACE
3-wire serial
SPI, QSPI, MICROWIRE, and DSP compatible
Schmitt trigger on SCLK
APPLICATIONS
Smart transmitters
Battery applications
Portable instrumentation
Sensor measurement
Temperature measurement
Pressure measurement
Weigh scales
4 to 20 mA loops
Rev.
0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
Tel: 781.329.4700
www.analog.com
FUNCTIONAL BLOCK DIAGRAM
03539-0-001
SERIAL
INTERFACE
AND
CONTROL
LOGIC
CLOCK
*AD7788: 16-BIT ADC
AD7789: 24-BIT ADC
AIN(+)
AIN(–)
GND
Σ
-
ADC*
AD7788/
AD7789
REFIN(+) REFIN(–)
V
DD
DOUT/RDY
DIN
SCLK
CS
Figure 1.
GENERAL DESCRIPTION
The AD7788/AD7789 are low power, low noise, analog front
ends for low frequency measurement applications. The AD7789
contains a low noise 24-bit ∑- ADC with one differential input.
The AD7788 is a 16-bit version of the AD7789.
The device operates from an internal clock. Therefore, the user
does not have to supply a clock source to the device. The output
data rate is 16.6 Hz, which gives simultaneous 50 Hz/60 Hz
rejection.
The part operates with a single power supply from 2.5 V to
5.25 V. When operating from a 3 V supply, the power dissipation
for the part is 225 μW maximum. The AD7788/AD7789 is
housed in a 10-lead MSOP.
相關(guān)PDF資料
PDF描述
AD7788BRM Low Power, 16-/24-Bit Sigma-Delta ADC
AD7788BRM-REEL Low Power, 16-/24-Bit Sigma-Delta ADC
AD7789BRM-REEL Low Power, 16-/24-Bit Sigma-Delta ADC
AD7790 Low Power, 16-Bit Buffered Sigma-Delta ADC
AD7790B Low Power, 16-Bit Buffered Sigma-Delta ADC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AD7790 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, 16-Bit Buffered Sigma-Delta ADC
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