- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373917 > AD7790BRM (ANALOG DEVICES INC) Low Power, 16-Bit Buffered Sigma-Delta ADC PDF資料下載
參數(shù)資料
| 型號(hào)： | AD7790BRM |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Low Power, 16-Bit Buffered Sigma-Delta ADC |
| 中文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10 |
| 封裝： | MSOP-10 |
| 文件頁(yè)數(shù)： | 13/20頁(yè) |
| 文件大小： | 299K |
| 代理商： | AD7790BRM |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)
AD7790
ADC CIRCUIT INFORMATION
OVERVIEW
The AD7790 is a low power ADC that incorporates a ∑-
modulator, a buffer, a PGA, and on-chip digital filtering intend-
ed for the measurement of wide dynamic range, low frequency
signals such as those in pressure transducers, weigh scales, and
temperature measurement applications.
Rev. 0 | Page 13 of 20
The part has one differential input that can be buffered or
unbuffered. Buffering the input channel means that the part can
accommodate significant source impedances on the analog
input and that R, C filtering (for noise rejection or RFI reduc-
tion) can be placed on the analog input, if required. The device
requires an external reference of 2.5 nominal. Figure 7 shows
the basic connections required to operate the part.
03538-0-006
IN+
10
μ
F
0.1
μ
F
IN–
OUT–
POWER
SUPPLY
OUT+
REFIN(+)
CS
DOUT/RDY
SCLK
V
DD
GND
AIN(+)
AIN(–)
REFIN(–)
AD7790
MICROCONTROLLER
Figure 7. Basic Connection Diagram
The output rate of the AD7790 (f
ADC
) is user programmable
with the settling time equal to 2 × t
ADC
. Normal mode rejection
is the major function of the digital filter. Table 13 lists the avail-
able output rates from the AD7790. Simultaneous 50 Hz and
60 Hz rejection is optimized when the update rate equals
16.6 Hz as notches are placed at both 50 Hz and 60 Hz with this
update rate (see Figure 6).
NOISE PERFORMANCE
Table 14 shows the output rms noise, rms resolution, and peak-
to-peak resolution (rounded to the nearest 0.5 LSB) for the
different update rates and input ranges for the AD7790. The
Table 15. Low Power Mode Selection
CDIV[1:0]
Clock
00
1
10
1/2
10
1/4
11
1/8
numbers given are with a reference of 2.5 V. The numbers are
typical and generated with a differential input voltage of 0 V.
The peak-to-peak resolution figures represent the resolution for
which there will be no code flicker within a six-sigma limit. The
output noise comes from two sources. The first is the electrical
noise in the semiconductor devices (device noise) used in the
implementation of the modulator. The second is quantization
noise, which is added when the analog input is converted into
the digital domain. The device noise is at a low level and is
independent of frequency. The quantization noise starts at an
even lower level but rises rapidly with increasing frequency to
become the dominant noise source.
Table 14. Typical Peak-to-Peak Resolution (Effective
Resolution) vs. Update Rate and Input Range
Input Range
Update Rate
±0.3125
±0.625
9.5
16 (16)
16 (16)
13.3
16 (16)
16 (16)
16.7
16 (16)
16 (16)
16.6
16 (16)
16 (16)
20
15.5 (16)
16 (16)
33.3
14.5 (16)
15.5 (16)
100
11.5 (14)
12.5 (15)
120
11 (13.5)
12 (14.5)
REDUCED CURRENT MODES
The AD7790 has a current consumption of 160 μA maximum
when operated with the buffer enabled and with a 5 V power
supply. The power can be reduced further by setting bits CDIV1
and CDIV0 in the filter register appropriately (see Table 15).
±1.25
16 (16)
16 (16)
16 (16)
16 (16)
16 (16)
16 (16)
13.5 (16)
13 (15.5)
±2.5
16 (16)
16 (16)
16 (16)
16 (16)
16 (16)
16 (16)
14.5 (16)
14 (16)
By setting these bits, the internal clock is divided by 2, 4, or 8
before being applied to the modulator and filter, resulting in a
reduction in the digital current.
When the internal clock is reduced, the update rate will also be
reduced. For example, if the filter bits are set to give an update
rate of 16.6 Hz when the AD7790 is operated in full clock mode,
the update rate will equal 8.3 Hz in divide by 2 mode. In these
low power modes, there may be some degradation in the ADC
performance.
Typ Current, Buffered (μA)
146
87
56
41
Typ Current, Unbuffered (μA)
75
45
30
25
50 Hz/60 Hz Rejection (dB)
70
72
88
89
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7790BRM-REEL | Low Power, 16-Bit Buffered Sigma-Delta ADC |
| AD7801BR | +2.7 V to +5.5 V, Parallel Input, Voltage Output 8-Bit DAC |
| AD7801BRU | +2.7 V to +5.5 V, Parallel Input, Voltage Output 8-Bit DAC |
| AD7801 | +2.7 V to +5.5 V, Parallel Input, Voltage Output 8-Bit DAC |
| AD7805 | +3.3 V to +5 V Quad/Octal 10-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7790BRM-REEL | 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 120sps 16-bit Serial 10-Pin MSOP T/R 制造商:Analog Devices 功能描述:ADC SGL DELTA-SIGMA 0.12KSPS 16BIT SERL 10MSOP - Tape and Reel |
| AD7790BRMZ | 功能描述:IC ADC 16BIT SIGMA-DELTA 10-MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁(yè)面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7790BRMZ | 制造商:Analog Devices 功能描述:IC 24-BIT ADC |
| AD7790BRMZ-REEL | 功能描述:IC ADC 16BIT SIGMA-DELTA 10-MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個(gè)單端，雙極；8 個(gè)差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
| AD7791 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Buffered 24-Bit Sigma-Delta ADC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。