參數(shù)資料
型號(hào): AD7794BRUZ-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 17/37頁(yè)
文件大?。?/td> 0K
描述: IC ADC 24BIT 6CH LP 24-TSSOP
產(chǎn)品培訓(xùn)模塊: ADC Applications
ADC Architectures
ADC DC/AC Performance
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 24
采樣率(每秒): 470
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.5mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類(lèi)型: 6 個(gè)差分,單極;6 個(gè)差分,雙極
配用: EVAL-AD7794EBZ-ND - BOARD EVALUATION FOR AD7794
AD7794/AD7795
Rev. D | Page 23 of 36
Bit No.
Mnemonic
Description
CON5
REF_DET
Enables the reference detect function. When set, the NOXREF bit in the status register indicates when the
external reference being used by the ADC is open circuit or less than 0.5 V. When cleared, the reference
detect function is disabled.
CON4
BUF
Configures the ADC for buffered or unbuffered mode of operation. If cleared, the ADC operates in
unbuffered mode, lowering the power consumption of the device. If set, the ADC operates in buffered
mode, allowing the user to place source impedances on the front end without contributing gain errors to
the system. For gains of 1 and 2, the buffer can be enabled or disabled. For higher gains, the buffer is
automatically enabled. With the buffer disabled, the voltage on the analog input pins can be from 30 mV
below GND to 30 mV above AVDD. When the buffer is enabled, it requires some headroom so the voltage
on any input pin must be limited to 100 mV within the power supply rails.
CON3 to
CON0
CH3 to CH0
Channel Select Bits.
Written by the user to select the active analog input channel to the ADC.
CH3
CH2
CH1
CH0
Channel
Calibration Pair
0
AIN1(+)/AIN1()
0
1
AIN2(+)/AIN2()
1
0
1
0
AIN3(+)/AIN3()
2
0
1
AIN4(+)/AIN4()
3
0
1
0
AIN5(+)/AIN5()
3
0
1
0
1
AIN6(+)/AIN6()
3
0
1
0
Temp Sensor
Automatically selects the internal 1.17 V reference
and sets the gain to 1
0
1
AVDD Monitor
Automatically selects the internal 1.17 V reference
and sets the gain to 1/6
1
0
AIN1()/AIN1()
0
1
0
1
Reserved
1
0
1
Reserved
1
0
Reserved
1
0
1
Reserved
1
0
Reserved
1
Reserved
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