參數(shù)資料
型號: AD7804
廠商: Analog Devices, Inc.
英文描述: +3.3 V to +5 V Quad/Octal 10-Bit DACs
中文描述: 3.3伏至5伏四/八通道10位DAC
文件頁數(shù): 17/28頁
文件大小: 300K
代理商: AD7804
AD7804/AD7805/AD7808/AD7809
–17–
REV. A
Table VII shows the twos complement transfer function for the
Sub DAC. Figure 23 shows the Sub DAC transfer function for
twos complement coding. Any Sub DAC output voltage can be
expressed as:
V
OUT
" =
V
BIAS
/16
×
(
NB
/256)
where NB is the decimal equivalent of the twos complement
input code. NB ranges from –128 to +127.
Table VII. Twos Complement Code Table for Sub DAC
Digital Input
MSB . . . LSB
Analog Input
01111111
01111111
00000001
00000000
11111111
10000001
10000000
(V
BIAS
/16)
×
(127/256)
(V
BIAS
/16)
×
(126/256)
(V
BIAS
/16)
×
(1/256)
0
(–V
BIAS
/16)
×
(1/256)
(–V
BIAS
/16)
×
(127/256)
(–V
BIAS
/16)
×
(128/256)
127
V
BIAS
256 16
0
D
128
V
BIAS
256 16
80
81
DAC INPUT CODE
FF
00
01
7E
7F
Figure 23. Sub DAC Output Voltage vs. DAC Input Codes
(HEX) for Twos Complement Coding
The total output for a single channel when using twos comple-
ment coding is the sum of the voltage from the Main DAC and
the Sub DAC.
V
OUT
=
V
OUT
' +
V
OUT
"
=
V
BIAS
+ 1.875
×
V
BIAS
×
(
NA
/1024) +
V
BIAS
/16
×
(
NB
/256)
=
V
BIAS
×
(1 + 1.875
×
NA
/1024 +
NB
/4096)
where NA ranges from –512 to +511 and NB ranges from –128 to
+127. Figure 28 shows a pictorial view of the transfer function for
any DAC.
Configuring the AD7805/AD7809 for Twos Complement Coding
Figure 24 shows a typical configuration for the AD7805/AD7809.
The circuit can be used for either 3.3 V or 5 V operation and uses
the internal V
DD
/2 as the reference for the part and 10-bit paral-
lel interfacing is used. The following are the steps required to
operate the Main DACs in this part.
0.01
m
F
AD7805/
AD7809
AV
DD
DV
DD
V
OUT
A
V
OUT
B
V
OUT
C
V
OUT
D
AGND
DGND
LDAC
CLR
COMP
MODE
CS
WR
D9
D0
DV
DD
REFIN
REFOUT
0.1
m
F
0.1
m
F
10
m
F
A1
A0
0.01
m
F
A2*
*USED ON THE
AD7809 ONLY
DIGITAL
INTERFACE
+3.3V/+5V
Figure 24. Typical Configuration for AD7805/AD7809
System Control Register Write:
MODE = 0, address inputs (A2, A1, A0) are don’t cares.
Write 020 Hex
Configure part for 10-bit parallel, twos
complement coding, normal operation
Channel Control Register Write:
MODE = 0, address inputs (A2, A1, A0) select desired channel.
Write 011 Hex
Internal V
DD
/2 selected as V
BIAS
for
DAC, and any DAC data writes that
follow are to the Main DAC.
DAC Data Register Write:
MODE = 1, address inputs (A2, A1, A0) select desired channel.
Write XXX Hex
With MODE = 1 all data writes are to
the selected DAC. XXX is the required
data. 200 Hex will give zero scale and 1FF
Hex will give full scale from the DAC.
相關(guān)PDF資料
PDF描述
AD7804BN ECONOLINE: REC2.2-S_DRW(Z)/H* - 2.2W DIP Package- 1kVDC Isolation- Regulated Output- 4.5-9V, 9-18V, 18-36V, 36-72V Wide Input Range 2 : 1- UL94V-0 Package Material- Continuous Short Circiut Protection- Cost Effective- 100% Burned In- Efficiency to 84%
AD7804BR +3.3 V to +5 V Quad/Octal 10-Bit DACs
AD7805BN %2B3.3V to %2B5V Quad/Octal 10-Bit DACs
AD7805BR %2B3.3V to %2B5V Quad/Octal 10-Bit DACs
AD7805BRS +3.3 V to +5 V Quad/Octal 10-Bit DACs
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