參數(shù)資料
型號: AD7805BR
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: %2B3.3V to %2B5V Quad/Octal 10-Bit DACs
中文描述: PARALLEL, WORD INPUT LOADING, 1.5 us SETTLING TIME, 10-BIT DAC, PDSO28
封裝: SOIC-28
文件頁數(shù): 7/28頁
文件大小: 300K
代理商: AD7805BR
AD7804/AD7805/AD7808/AD7809
–7–
REV. A
AD7804/AD7808 PIN FUNCTION DESCRIPTION
AD7804
Pin No.
AD7808
Pin No.
Mnemonic
Description
1
2, 3
4
1, 6
2, 3
4
5
AGND
V
OUT
B, V
OUT
A
REFOUT
PD
Ground reference point for analog circuitry.
Analog output voltage from the DACs.
Reference Output. This is a bandgap reference and is typically 1.23 V.
Active low input used to put the part into low power mode reducing current consumption
to 1
μ
A.
Analog output voltages from the DACs.
Level-triggered control input (active low). This is the frame synchronization signal for the
input data. When
FSIN
goes low, it enables the input shift register and data is transferred
on the falling edges of CLKIN.
LDAC
Input. When this digital input is taken low, all DAC registers are simultaneously
updated with the contents of the data registers. If
LDAC
is tied permanently low, or is
low on the sixteenth falling clock edge with timing similar to that of SDIN, an automatic
update will take place.
Serial Data Input. These devices accept a 16-bit word. Data is clocked into the input shift
register on the falling edge of CLKIN.
Ground reference point for digital circuitry.
Digital Power Supply.
Clock Input. Data is clocked into the input shift register on the falling edges of CLKIN.
Duty Cycle should be between 40% and 60%.
Asynchronous
CLR
Input. When this input is taken low, all Main DAC outputs are
cleared either to V
BIAS
or to V
BIAS
/16 volts. All Sub DACs are also cleared and thus the
transfer function of the Main DAC will remain centered around the V
BIAS
point.
No Connect. This pin should be left open circuit.
Analog output voltages from the DACs.
This is an external reference input for the DACs. When this reference is selected for a
DAC in the control register, the analog output from the selected DAC swings around this
point.
Compensation Pin. This pin provides an output from the internal V
DD
/2 divider and is
provided for ac bypass purposes only. This pin should be decoupled with 1 nF capacitors
to both AV
DD
and AGND. This pin can be overdriven with an external reference, thus
giving the facility for two external references on the part.
Analog output voltage from the DACs.
Analog Power Supply. +3.3 V to +5 V.
7, 8
9
V
OUT
F, V
OUT
E
FSIN
5
6
10
LDAC
7
11
SDIN
8
9
10
12
13
14
DGND
DV
DD
CLKIN
11
15
CLR
16
17, 18
20
NC
V
OUT
H, V
OUT
G
REFIN
12
13
21
COMP
14, 15
16
22, 23
19, 24
V
OUT
D, V
OUT
C
AV
DD
AD7804 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AGND
V
OUT
B
V
OUT
A
REFOUT
FSIN
LDAC
SDIN
DGND
AV
DD
V
OUT
C
V
OUT
D
COMP
REFIN
CLR
CLKIN
DV
DD
AD7804
AD7808 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
AD7808
NC = NO CONNECT
DGND
SDIN
LDAC
FSIN
V
OUT
E
AGND
V
OUT
B
V
OUT
A
REFOUT
V
OUT
F
AGND
PD
DV
DD
CLKIN
CLR
NC
V
OUT
H
AV
DD
V
OUT
C
V
OUT
D
COMP
V
OUT
G
AV
DD
REFIN
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