參數(shù)資料
型號(hào)： AD7805BRS
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： +3.3 V to +5 V Quad/Octal 10-Bit DACs
中文描述： PARALLEL, WORD INPUT LOADING, 1.5 us SETTLING TIME, 10-BIT DAC, PDSO28
封裝： SSOP-28
文件頁數(shù)： 2/28頁
文件大小： 300K
代理商： AD7805BRS
AD7804/AD7805/AD7808/AD7809
AD7804/AD7805–SPECIFICATIONS
REV. A
–2–
Parameter
B Grade
1
C Grade
1
Units
Comments
STATIC PERFORMANCE
MAIN DAC
Resolution
Relative Accuracy
Gain Error
Bias Offset Error
2
Zero-Scale Error
3
10
±
3
±
3
–80/+40
–
V
BIAS
16
10
±
3
±
3
–80/+40
–
V
BIAS
16
Bits
LSB max
% FSR max
mV max
mV max
DAC Code = 0.5 Full Scale
DAC Code = 000H for Offset Binary
Monotonicity
Minimum Load Resistance
SUB DAC
Resolution
Differential Nonlinearity
9
2
10
2
Bits
k
min
and 200H for Twos Complement Coding
8
±
0.125
±
0.5
8
±
0.125
±
0.5
Bits
LSB typ
LSB max
Refers to an LSB of the Main DAC
OUTPUT CHARACTERISTICS
Output Voltage Range
3
V
BIAS
±
15/16
×
V
BIAS
V
BIAS
/16 to 31/16
×
V
BIAS
4
2.5
1
0.5
0.5
±
0.2
2
0.002
V
BIAS
±
15/16
×
V
BIAS
V
BIAS
/16 to 31/16
×
V
BIAS
4
2.5
1
0.5
0.5
±
0.2
2
0.002
V
V
μ
s max
V/
μ
s typ
nV-s typ
nV-s typ
nV-s typ
LSB typ
typ
%/% typ
Twos Complement Coding
Offset Binary Coding
Typically 1.5
μ
s
Voltage Output Settling Time to 10 Bits
Slew Rate
Digital-to-Analog Glitch Impulse
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DC Output Impedance
Power Supply Rejection Ratio
DAC REFERENCE INPUTS
REF IN Range
REF IN Input Leakage
DIGITAL INPUTS
Input High Voltage, V
IH
@ V
DD
= 5 V
Input High Voltage, V
IH
@ V
DD
= 3.3 V
Input Low Voltage, V
IL
@ V
DD
= 5 V
Input Low Voltage, V
IL
@ V
DD
= 3.3 V
Input Leakage Current
Input Capacitance
Input Coding
REFERENCE OUTPUT
REF OUT Output Voltage
REF OUT Error
REF OUT Temperature Coefficient
REF OUT Output Impedance
POWER REQUIREMENTS
V
DD
(AV
DD
and DV
DD
)
I
DD
(AI
DD
Plus DI
DD
)
Normal Mode
System Standby (SSTBY) Mode
Power-Down (
PD
) Mode
@ +25
°
C
T
MIN
–T
MAX
Power Dissipation
Normal Mode
System Standby (SSTBY) Mode
Power-Down (
PD
) Mode
@ +25
°
C
T
MIN
–T
MAX
1 LSB Change Around the Major Carry
V
DD
±
10%
1.0 to V
DD
/2
±
1
1.0 to V
DD
/2
±
1
V min to V max
μ
A max
Typically
±
1 nA
2.4
2.1
0.8
0.6
±
10
10
Twos Comp/Binary
2.4
2.1
0.8
0.6
μ
A max
10
Twos Comp/Binary
V min
V min
V max
V max
pF max
1.23
±
8
–100
5
1.23
±
8
–100
5
V nom
% max
ppm/
°
C typ
k
nom
3/5.5
3/5.5
V min to V max
Excluding Load Currents
V
IH
= V
DD
, V
IL
= DGND
V
IH
= V
DD
, V
IL
= DGND
12
250
12
250
mA max
μ
A
0.8
1.5
0.8
1.5
μ
A max
μ
A max
V
IH
= V
DD
, V
IL
= DGND
Excluding Power Dissipated in Load
66
1.38
66
1.38
mW max
mW max
4.4
8.25
4.4
8.25
μ
W max
μ
W max
NOTES
1
Temperature range is –40
°
C to +85
°
C.
2
Can be minimized using the Sub DAC.
3
V
BIAS
is the center of the output voltage swing and can be V
DD
/2, Internal Reference or REFIN as determined by MX1 and MX0 in the channel control register.
Specifications subject to change without notice.
(AV
DD
and DV
DD
= 3.3 V
6
10% to 5 V
6
10%; AGND = DGND = 0 V;
Reference = Internal Reference; C
L
= 100 pF; R
L
= 2 k
V
to GND. Sub DAC at Midscale. All specifications T
MIN
to T
MAX
unless otherwise noted.)
/
+
40
/
+
40
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