AD7804/AD7805/AD7808/AD7809
REV. A
–2–
Parameter
B Grade1
C Grade1
Units
Comments
STATIC PERFORMANCE
MAIN DAC
Resolution
10
Bits
Relative Accuracy
±3
LSB max
Gain Error
±3
% FSR max
Bias Offset Error
2
–80/+40
mV max
DAC Code = 0.5 Full Scale
Zero-Scale Error
3
mV max
DAC Code = 000H for Offset Binary
Monotonicity
9
10
Bits
and 200H for Twos Complement Coding
Minimum Load Resistance
2
k
min
SUB DAC
Resolution
8
Bits
Differential Nonlinearity
±0.125
LSB typ
Refers to an LSB of the Main DAC
±0.5
LSB max
OUTPUT CHARACTERISTICS
Output Voltage Range3
VBIAS ± 15/16 × VBIAS
V
Twos Complement Coding
VBIAS/16 to 31/16 × VBIAS
V
Offset Binary Coding
Voltage Output Settling Time to 10 Bits
4
s max
Typically 1.5
s
Slew Rate
2.5
V/
s typ
Digital-to-Analog Glitch Impulse
1
nV-s typ
1 LSB Change Around the Major Carry
Digital Feedthrough
0.5
nV-s typ
Digital Crosstalk
0.5
nV-s typ
Analog Crosstalk
±0.2
LSB typ
DC Output Impedance
2
typ
Power Supply Rejection Ratio
0.002
%/% typ
V
DD ± 10%
DAC REFERENCE INPUTS
REF IN Range
1.0 to VDD/2
V min to V max
REF IN Input Leakage
±1
A max
Typically
±1 nA
DIGITAL INPUTS
Input High Voltage, VIH @ VDD = 5 V
2.4
V min
Input High Voltage, VIH @ VDD = 3.3 V
2.1
V min
Input Low Voltage, VIL @ VDD = 5 V
0.8
V max
Input Low Voltage, VIL @ VDD = 3.3 V
0.6
V max
Input Leakage Current
±10
A max
Input Capacitance
10
pF max
Input Coding
Twos Comp/Binary
REFERENCE OUTPUT
REF OUT Output Voltage
1.23
V nom
REF OUT Error
±8
% max
REF OUT Temperature Coefficient
–100
ppm/
°C typ
REF OUT Output Impedance
5
k
nom
POWER REQUIREMENTS
VDD (AVDD and DVDD)
3/5.5
V min to V max
IDD (AIDD Plus DIDD)
Excluding Load Currents
Normal Mode
12
mA max
VIH = VDD, VIL = DGND
System Standby (SSTBY) Mode
250
AV
IH = VDD, VIL = DGND
Power-Down (
PD) Mode
@ +25
°C
0.8
A max
VIH = VDD, VIL = DGND
TMIN–TMAX
1.5
A max
Power Dissipation
Excluding Power Dissipated in Load
Normal Mode
66
mW max
System Standby (SSTBY) Mode
1.38
mW max
Power-Down (
PD) Mode
@ +25
°C
4.4
W max
TMIN–TMAX
8.25
W max
NOTES
1Temperature range is – 40
°C to +85°C.
2Can be minimized using the Sub DAC.
3V
BIAS is the center of the output voltage swing and can be VDD/2, Internal Reference or REFIN as determined by MX1 and MX0 in the channel control register.
Specifications subject to change without notice.
(AVDD and DVDD = 3.3 V
10% to 5 V
10%; AGND = DGND = 0 V;
Reference = Internal Reference; CL = 100 pF; RL = 2 k
to GND. Sub DAC at Midscale. All specifications TMIN to TMAX unless otherwise noted.)
AD7804/AD7805–SPECIFICATIONS
–VBIAS
16
/
+40
–VBIAS
16
/
+40