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參數(shù)資料
| 型號： | AD7840ARS-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT LOW POWER 5V 24SSOP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1,500 |
| 設置時間： | 2.5µs |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 100mW |
| 工作溫度： | -25°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 24-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，雙極 |
| 采樣率（每秒）： | 400k |
AD7840
REV. B
–9–
Figure 11. AD7840 Dynamic Performance Test Circuit
The digitizer sampling is synchronized with the AD7840 update
rate to ease FFT calculations. The digitizer samples the
AD7840 after the output has settled to its new value. Therefore,
if the digitizer was to sample the output directly it would effec-
tively be sampling a dc value each time. As a result, the dynamic
performance of the AD7840 would not be measured correctly.
Using the digitizer directly on the AD7840 output would give
better results than the actual performance of the AD7840. Us-
ing a filter between the DAC and the digitizer means that the
digitizer samples a continuously moving signal and the true dy-
namic performance of the AD7840 is measured.
Some applications will require improved performance versus fre-
quency from the AD7840. In these applications, a simple
sample-and-hold circuit such as that outlined in Figure 12 will
extend the very good performance of the AD7840 to 20 kHz.
Figure 12. Sample-and-Hold Circuit
Other applications will already have an inherent sample-and-
hold function following the AD7840. An example of this type of
application is driving a switched-capacitor filter where the up-
dating of the DAC is synchronized with the switched-capacitor
filter. This inherent sample-and-hold function also extends the
frequency range performance of the AD7840.
Performance versus Frequency
The typical performance plots of Figures 13 and 14 show the
AD7840’s performance over a wide range of input frequencies
at an update rate of 100 kHz. The plot of Figure 13 is without a
sample-and-hold on the AD7840 output while the plot of Figure
14 is generated with the sample-and-hold circuit of Figure 12 on
the output.
Figure 13. Performance vs. Frequency
(No Sample-and-Hold)
Figure 14. Performance vs. Frequency
(with Sample-and-Hold)
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| AD7840ARSZ | 功能描述:IC DAC 14BIT LOW POWER 5V 24SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD7840ARSZ-REEL | 功能描述:IC DAC 14BIT LOW POWER 5V 24SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應商設備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7840BQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Complete 14-Bit DAC |
| AD7840CQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:14-Bit Digital-to-Analog Converter |
| AD7840JN | 功能描述:IC DAC 14BIT LC2MOS VOUT 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:750 系列:- 設置時間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應商設備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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