Parameter1 J, A Versions K, B Versions Unit Test Conditions/Comments DIGIT" />
參數(shù)資料
型號(hào): AD7846KN
廠商: Analog Devices Inc
文件頁(yè)數(shù): 19/24頁(yè)
文件大?。?/td> 0K
描述: IC DAC 16BIT LC2MOS VOUT 28-DIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 13
設(shè)置時(shí)間: 7µs
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 100mW
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 28-DIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 28-PDIP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 143k
AD7846
Rev. G | Page 4 of 24
Parameter1
J, A Versions
K, B Versions
Unit
Test Conditions/Comments
DIGITAL OUTPUTS
VOL (Output Low Voltage)
0.4
V max
ISINK = 1.6 mA
VOH (Output High Voltage)
4.0
V min
ISOURCE = 400 μA
Floating State Leakage Current
±10
μA max
DB0 to DB15 = 0 to VCC
Floating State Output Capacitance2
10
pF max
POWER REQUIREMENTS3
VDD
+11.4/+15.75
V min/V max
VSS
11.4/15.75
V min/V max
VCC
+4.75/+5.25
V min/V max
IDD
5
mA max
VOUT unloaded
ISS
5
mA max
VOUT unloaded
ICC
1
mA max
Power Supply Sensitivity4
1.5
LSB/V max
Power Dissipation
100
mW typ
VOUT unloaded
1 Temperature ranges as follows: J, K versions: 0°C to +70°C; A, B versions: 40°C to +85°C.
2 Guaranteed by design and characterization, not production tested.
3 The AD7846 is functional with power supplies of ±12 V. See the Typical Performance Characteristics section.
4 Sensitivity of gain error, offset error, and bipolar zero error to VDD, VSS variations.
AC PERFORMANCE CHARACTERISTICS
These characteristics are included for design guidance and are not subject to test. VREF+ = +5 V; VDD = +14.25 V to +15.75 V; VSS = 14.25 V
to 15.75 V; VCC = +4.75 V to +5.25 V; RIN connected to 0 V, unless otherwise noted.
Table 2.
Parameter
Limit at TMIN to TMAX (All Versions)
Unit
Test Conditions/Comments
Output Settling Time1
6
μs max
To 0.006% FSR, VOUT loaded, VREF = 0 V, typically 3.5 μs
9
μs max
To 0.003% FSR, VOUT loaded, VREF = –5 V, typically 6.5 μs
Slew Rate
7
V/μs typ
Digital-to-Analog Glitch
Impulse
70
nV-sec typ
DAC alternately loaded with 10…0000 and 01…1111,
VOUT unloaded
AC Feedthrough
0.5
mV p-p typ
VREF = 0 V, VREF+ = 1 V rms, 10 kHz sine wave, DAC loaded
with all 0s
Digital Feedthrough
10
nV-sec typ
DAC alternately loaded with all 1s and all 0s. CS high
Output Noise Voltage
Density, 1 kHz to 100 kHz
50
nV/√Hz typ
Measured at VOUT, DAC loaded with 0111011…11,
VREF+ = VREF = 0 V
1
LDAC = 0. Settling time does not include deglitching time of 2.5 μs (typ).
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