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參數(shù)資料
型號: AD7849ARZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 2/20頁
文件大?。?/td> 0K
描述: IC DAC 14/16BIT SRL-IN 20-SOIC
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1,000
設置時間: 7µs
位數(shù): 14
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 100mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 20-SOIC W
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 143k
AD7849
Rev. C | Page 10 of 20
TERMINOLOGY
Least Significant Bit
This is the analog weighting of 1 bit of the digital word in a
DAC. For the B version and the C versions, 1 LSB = (VREF+
VREF)/216. For the A version, 1 LSB = (VREF+ VREF)/214.
Relative Accuracy
Relative accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for both endpoints (that is, offset and gain errors are
adjusted out) and is normally expressed in least significant bits
or as a percentage of full-scale range.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal change between any two adjacent codes. A
specified differential nonlinearity of less than ±1 LSB over the
operating temperature range ensures monotonicity.
Gain Error
Gain error is a measure of the output error between an ideal
DAC and the actual device output with all 1s loaded after offset
error has been adjusted out. Gain error is adjustable to zero
with an external potentiometer.
Offset Error
This is the error present at the device output with all 0s loaded
in the DAC. It is due to the op amp input offset voltage and bias
current and the DAC leakage current.
Bipolar Zero Error
When the AD7849 is connected for bipolar output and (100 …
000) is loaded to the DAC, the deviation of the analog output
from the ideal midscale of 0 V is called the bipolar zero error.
Digital-to-Analog Glitch Impulse
This is the amount of charge injected from the digital inputs to
the analog output when the inputs change state. Normally, this
is specified as the area of the glitch in nV-secs.
Multiplying Feedthrough Error
This is an ac error due to capacitive feedthrough from either of
the VREF terminals to VOUT when the DAC is loaded with all 0s.
Digital Feedthrough
When the DAC is not selected (SYNC is held high), high
frequency logic activity on the digital inputs is capacitively
coupled through the device to show up as noise on the VOUT pin.
This noise is digital feedthrough.
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