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參數(shù)資料
| 型號： | AD7849CNZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT SERIAL INP 20DIP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 18 |
| 設(shè)置時間： | 7µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 100mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 20-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 20-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 143k |
AD7849
Rev. C | Page 17 of 20
APPLICATIONS INFORMATION
OPTO-ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators can provide voltage isolation in
excess of 3 kV. The serial loading structure of the AD7849
makes it ideal for opto-isolated interfaces because the number
of interface lines is kept to a minimum.
The DCEN pin must be connected high to enable the daisy-chain
facility. Four channels with 14-bit or 16-bit resolution are provided
in the circuit shown, but this can be expanded to accommodate
any number of DAC channels without any extra isolation circuitry.
The only limitation is the output update rate. For example, if an
output update rate of 10 kHz is required, then all DACs must be
loaded and updated in 100 μs. Operating at the maximum clock
rate of 5 MHz means that it takes 3.2 μs to load a DAC. This means
that the total number of channels for this update rate is 31, which
leaves 800 ns for the LDAC pulse. Of course, as the update rate
requirement decreases, the number of possible channels increases.
The sequence of events to program the output channels in
Figure 28 is as follows:
1.
Take the SYNC line low.
2.
Transmit the data as four 16-bit words. A total of 64 clock
pulses is required to clock the data through the chain.
3.
Take the SYNC line high.
4.
Pulse the LDAC line low. This updates all output channels
simultaneously on the falling edge of LDAC.
To reduce the number of optocouplers, the LDAC line can be
driven from one shot that is triggered by the rising edge on the
SYNC line. A low level pulse of 100 ns duration or greater is all
that is required to update the outputs.
VDD
DATA OUT
CLOCK OUT
SYNC OUT
CONTROL OUT
CONTROLLER
VOUTA
VOUTB
VOUTC
VOUTD
5V
QUAD OPTO-COUPLER
*ADDITIONAL PINS OMITTED FOR CLARITY.
LDAC
SDIN
VOUT
DCEN
SDOUT
AD7849*
5V
LDAC
SDIN
VOUT
DCEN
SDOUT
AD7849*
5V
LDAC
SDIN
VOUT
DCEN
SDOUT
AD7849*
5V
SCLK
SYNC
LDAC
SDIN
VOUT
DCEN
SDOUT
AD7849*
0
1008-
031
SCLK
SYNC
SCLK
SYNC
SCLK
SYNC
Figure 28. 4-Channel Opto-Isolated Interface
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| AD7849TQ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Serial Input, 14-Bit/16-Bit DAC |
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