1VIN1 Analog Input Channel 1. This " />
參數(shù)資料
型號(hào): AD7874AR-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 12/16頁(yè)
文件大小: 0K
描述: IC DAS 12BIT 4CH 5V 28-SOIC
標(biāo)準(zhǔn)包裝: 400
類(lèi)型: 數(shù)據(jù)采集系統(tǒng)(DAS)
分辨率(位): 12 b
采樣率(每秒): 116k
數(shù)據(jù)接口: 并聯(lián)
電壓電源: 雙 ±
電源電壓: ±5V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 帶卷 (TR)
AD7874
REV. C
–5–
PIN FUNCTION DESCRIPTION
Pin
Mnemonic
Description
1VIN1
Analog Input Channel 1. This is the first of the four input channels to be converted in a con-
version cycle. Analog input voltage range is
±10 V.
2VIN2
Analog Input Channel 2. Analog input voltage range is
±10 V.
3VDD
Positive supply voltage, +5 V
± 5%. This pin should be decoupled to AGND.
4
INT
Interrupt. Active low logic output indicating converter status. See Figure 7.
5
CONVST
Convert Start. Logic Input. A low to high transition on this input puts the track/hold into its
hold mode and starts conversion. The four channels are converted sequentially, Channel 1 to
Channel 4. The CONVST input is asynchronous to CLK and independent of CS and RD.
6
RD
Read. Active low logic input. This input is used in conjunction with CS low to enable the
data outputs. Four successive reads after a conversion will read the data from the four chan-
nels in the sequence, Channel 1, 2, 3, 4.
7
CS
Chip Select. Active low logic input. The device is selected when this input is active.
8
CLK
Clock Input. An external TTL-compatible clock may be applied to this input pin. Alterna-
tively, tying this pin to VSS enables the internal laser trimmed clock oscillator.
9VDD
Positive Supply Voltage, +5 V
± 5%. Same as Pin 3; both pins must be tied together at the
package. This pin should be decoupled to DGND.
10
DB11
Data Bit 11 (MSB). Three-state TTL output. Output coding is 2s complement.
11–13
DB10–DB8
Data Bit 10 to Data Bit 8. Three-state TTL outputs.
14
DGND
Digital Ground. Ground reference for digital circuitry.
15–21
DB7–DB1
Data Bit 7 to Data Bit 1. Three-state TTL outputs.
22
DB0
Data Bit 0 (LSB). Three-state TTL output.
23
AGND
Analog Ground. Ground reference for track/hold, reference and DAC.
24
REF IN
Voltage Reference Input. The reference voltage for the part is applied to this pin. It is inter-
nally buffered, requiring an input current of only
±1 A. The nominal reference voltage for
correct operation of the AD7874 is 3 V.
25
REF OUT
Voltage Reference Output. The internal 3 V analog reference is provided at this pin. To oper-
ate the AD7874 with internal reference, REF OUT is connected to REF IN. The external
load capability of the reference is 500
A.
26
VSS
Negative Supply Voltage, –5 V
± 5%.
27
VIN3
Analog Input Channel 3. Analog input voltage range is
±10 V.
28
VIN4
Analog Input Channel 4. Analog input voltage range is
±10 V.
ORDERING GUIDE
Relative
Temperature
SNR
Accuracy
Package
Model
1
Range
(dBs)
(LSB)
Option
2
AD7874AN
–40
°C to +85°C
70 min
±1 max
N-28
AD7874BN
–40
°C to +85°C
72 min
±1/2 max
N-28
AD7874AR
–40
°C to +85°C
70 min
±1 max
R-28
AD7874BR
–40
°C to +85°C
72 min
±1/2 max
R-28
AD7874AQ
–40
°C to +85°C
70 min
±1 max
Q-28
AD7874BQ
–40
°C to +85°C
72 min
±1/2 max
Q-28
AD7874SQ
3
–55
°C to +125°C 70 min
±1 max
Q-28
AD7874SE3
–55
°C to +125°C 70 min
±1 max
E-28A
NOTES
1To order MIL-STD-883, Class B processed parts, add /883B to part number. Contact
1our local sales office for military data sheet and availability.
2E = Leaded Ceramic Chip Carrier; N = Plastic DIP; Q = Cerdip; R = SOIC.
3Available to /883B processing only.
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