參數(shù)資料
型號(hào)： AD7875KRZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 14/28頁(yè)
文件大小： 0K
描述： IC ADC 12BIT SAMPLING 5V 24SOIC
產(chǎn)品變化通告： Conversion Time Change
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
采樣率（每秒）： 100k
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 95mW
電壓電源： 雙 ±
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 24-SOIC W
包裝： 管件
輸入數(shù)目和類型： 1 個(gè)單端，單極
AD7870/AD7875/AD7876
Rev. C | Page 21 of 2
8
CONVST
12/8/CLK
2k
+5V
–5V
4.7k
CLKR
FSR
DR
SCLK
SSTRB
SDATA
ADSP-2101/
ADSP-2102
07
73
0-
02
9
TIMER
1ADDITIONAL PINS OMITTED FOR CLARITY.
AD7870/
AD7875/
AD78761
TMS32020 Serial Interface
Figure 28 shows a serial interface between the AD7870/
AD7875/AD7876 and the TMS32020. The AD7870/AD7875/
AD7876 is configured for continuous clock operation. Note
that the ADC will not interface correctly to the TMS32020 if the
ADC is configured for a noncontinuous clock. Data is clocked
into the data receive register (DRR) of the TMS32020 during
conversion. As with the previous interfaces, when a 16-bit word
is received by the TMS32020 it generates an internal interrupt
to read the data from the DRR.
CONVST
12/8/CLK
2k
5V
–5V
4.7k
CLKR
FSR
DR
SCLK
SSTRB
SDATA
TMS32020
07
73
0-
02
8
TIMER
1ADDITIONAL PINS OMITTED FOR CLARITY.
AD7870/
AD7875/
AD78761
Figure 29. ADSP-2101/ADSP-2102 Serial Interface
STANDALONE OPERATION
The AD7870/AD7875/AD7876 can be used in its Mode 2,
parallel interface mode for standalone operation. In this case,
conversion is initiated with a pulse to the ADC CS input. This
pulse must be longer than the conversion time of the ADC. The
BUSY output is used to drive the RD input. Data is latched from
the ADC DB0–DB11 outputs to an external latch on the rising
edge of BUSY.
CS
tCS1
1
tCS > t16 + tCONVERT.
2ADDITIONAL PINS OMITTED FOR CLARITY.
BUSY
DB11
RD
DB0
EN
LATCH
07
73
0-
0
30
AD7870/
AD7875/
AD78762
Figure 28. TMS32020 Serial Interface
ADSP-2101/ADSP-2102 Serial Interface
Figure 29 shows a serial interface between the AD7870/
AD7875/AD7876 and the ADSP-2101/ADSP-2102. The ADC
is configured for continuous clock operation. Data is clocked
into the serial port register of the ADSP-2101/ADSP-2102
during conversion. As with the previous interfaces, when a 16-
bit data word is received by the ADSP-2101/ADSP-2102 an
internal microprocessor interrupt is generated and the data is
read from the serial port register.
Figure 30. Stand-Alone Operation
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