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| 型號： | AD7890AR-4REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS 12BIT 8CH 24-SOIC |
| 標準包裝： | 1,000 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 117k |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 單電源 |
| 電源電壓： | 5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
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AD7890
Rev. C | Page 15 of 28
In the self-clocking mode, the AD7890 indicates when
conversion is complete by bringing the RFS line low and
initiating a serial data transfer. In the external clocking mode,
there is no indication of when conversion is complete. In many
applications, this is not a problem as the data can be read from
the part during conversion or after conversion. However,
applications that seek to achieve optimum performance from
the AD7890 has to ensure that the data read does not occur
during conversion or during 500 ns prior to the rising edge
of CONVST.
This can be achieved in either of two ways. The first is to ensure
in software that the read operation is not initiated until 5.9 μs
after the rising edge of CONVST. This is only possible if the
software knows when the CONVST command is issued. The
second scheme would be to use the CONVST signal as both the
conversion start signal and an interrupt signal. The simplest
way to do this is to generate a square wave signal for CONVST
with high and low times of 5.9 μs (see Figure 8). Conversion is
initiated on the rising edge of CONVST. The falling edge of
CONVST occurs 5.9 μs later and can be used as either an active
low or falling edge-triggered interrupt signal to tell the
processor to read the data from the AD7890. Provided the read
operation is completed 500 ns before the rising edge of
CONVST, the AD7890 operates to specification.
This scheme limits the throughput rate to 11.8 μs minimum.
However, depending upon the response time of the
microprocessor to the interrupt signal and the time taken by the
processor to read the data, this may be the fastest which the
system could have operated. In any case, the CONVST signal
does not have to have a 50:50 duty cycle. This can be tailored to
optimize the throughput rate of the part for a given system.
Alternatively, the CONVST signal can be used as a normal
narrow pulse width. The rising edge of CONVST can be used as
an active high or rising edge-triggered interrupt. A software
delay of 5.9 μs can then be implemented before data is read
from the part.
NEXT CONVST
RISING EDGE
CONVERSION IS
INITIATED AND
TRACK/HOLD GOES
INTO HOLD
CONVERSION
ENDS 5.9s
LATER
MICROPROCESSOR
INT SERVICE
OR POLLING
ROUTINE
SERIAL READ
AND WRITE
OPERATIONS
READ AND WRITE
OPERATIONS SHOULD
END 500ns PRIOR
TO NEXT RISING
EDGE OF CONVST
tCONVERT
500ns MIN
RFS
TFS
CONVST
SCLK
01
35
7-
0
08
Figure 8. CONVST Used as Status Signal in External Clocking Mode
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| AD7890ARZ-10 | 功能描述:IC DAS 12BIT 8CH 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Data Converter Basics 標準包裝:1 系列:- 類型:電機控制 分辨率（位）:12 b 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，并聯(lián) 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應商設(shè)備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
| AD7890ARZ-10REEL | 功能描述:IC DAS 12BIT 8CH 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7890ARZ-2 | 功能描述:IC DAS 12BIT 8CH 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7890ARZ-2REEL | 功能描述:IC DAS 12BIT 8CH 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
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