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參數(shù)資料
| 型號： | AD7891YSZ-1REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS 12BIT 8CH 44-MQFP |
| 標準包裝： | 800 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 500k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 電壓電源： | 單電源 |
| 電源電壓： | 5V |
| 工作溫度： | -55°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應商設備封裝： | 44-MQFP（10x10） |
| 包裝： | 帶卷 (TR) |
AD7891
–7–
REV. D
PARALLEL INTERFACE MODE FUNCTIONS
PLCC Pin No.
MQFP Pin No. Mnemonic
Description
8, 31
2, 25
NC
No Connect. The two NC pins on the device can be left unconnected. If they
are to be connected to a voltage, it should be to ground potential. To ensure
correct operation of the AD7891, neither of the NC pins should be connected
to a logic high potential.
29
23
CS
Chip Select Input. Active low logic input that is used in conjunction with to
enable the data outputs and with
WR to allow input data to be written to the part.
28
22
RD
Read Input. Active low logic input that is used in conjunction with
CS low to
enable the data outputs.
27
21
WR
Write Input. Active low logic input used in conjunction with
CS to latch the mul-
tiplexer address and software control information. The rising edge of this input
also initiates an internal pulse. When using the software start facility, this pulse
delays the point at which the track/hold goes into hold and conversion is initiated.
This allows the multiplexer to settle and the acquisition time of the track/hold to
elapse when a channel address is changed. If the SWCON bit of the control regis-
ter is set to 1, when this pulse times out, the track/hold then goes into hold and
conversion is initiated. If the SWCON bit of the control register is set to 0, the
track/hold and conversion sequence are unaffected by
WR operation.
Data I/O Lines
There are 12 data input/output lines on the AD7891. When the part is configured for parallel mode (MODE = 1), the output data
from the part is provided at these 12 pins during a read operation. For a write operation in parallel mode, these lines provide access
to the part’s control register.
Parallel Read Operation
During a parallel read operation, the 12 lines become the 12 data bits containing the conversion result from the AD7891. These
data bits are labelled Data Bit 0 (LSB) to Data Bit 11 (MSB). They are three-state, TTL compatible outputs. Output data coding
is twos complement when the data FORMAT bit of the control register is 1, and straight binary when the data FORMAT bit of
the control register is 0.
PLCC Pin No.
MQFP Pin No. Mnemonic
Description
13 to 18,
7 to 12,
DB0 to DB11 Data Bit 0 (LSB) to Data Bit 11 (MSB). Three-state TTL compatible
21 to 26
15 to 20
outputs that are controlled by the
CS and RD inputs.
Parallel Write Operation
During a parallel write operation, the following functions can be written to the control register via the 12 data input/output pins.
PLCC Pin No.
MQFP Pin No. Mnemonic
Description
23
17
A0
Address Input. The status of this input during a parallel write operation is
latched to the A0 bit of the control register (see Control Register section).
22
16
A1
Address Input. The status of this input during a parallel write operation is
latched to the A1 bit of the control register (see Control Register section).
21
15
A2
Address Input. The status of this input during a parallel write operation is
latched to the A2 bit of the control register (see Control Register section).
24
18
SWCON
Software Conversion Start. The status of this input during a parallel write
operation is latched to the SWCONV bit of the control register (see Control
Register section).
25
19
SWSTBY
Software Standby Control. The status of this input during a parallel write
operation is latched to the SWSTBY bit of the control register (see Control
Register section).
26
20
FORMAT
Data Format Selection. The status of this input during a parallel write operation is
latched to the FORMAT bit of the control register (see Control Register section).
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| AD7891YSZ-2 | 功能描述:IC DAS 12BIT 8CH 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7892A-2REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:Analog Devices 功能描述: |
| AD7892AN-1 | 功能描述:IC ADC 12BIT LP 500KSPS 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7892AN-2 | 功能描述:IC ADC 12BIT LP 500KSPS 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7892AN-3 | 制造商:Rochester Electronics LLC 功能描述:12-BIT 600 KSPS ADC I.C. - Bulk 制造商:Analog Devices 功能描述: |
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