參數(shù)資料
型號(hào)： AD7895BR-10
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： 5 V, 12-Bit, Serial 3.8 ms ADC in 8-Pin Package
中文描述： 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝： SOIC-8
文件頁(yè)數(shù)： 2/12頁(yè)
文件大小： 314K
代理商： AD7895BR-10
–2–
REV. 0
AD7895–SPECIFICATIONS
Parameter
DYNAMIC PERFORMANCE
2
Signal to (Noise + Distortion) Ratio
3
@ +25
°
C
T
MIN
to T
MAX
Total Harmonic Distortion (THD)
3
A Versions
l
B Versions
Units
Test Conditions/Comments
70
70
–78
70
70
–78
dB min
dB min
dB max
f
IN
= 50 kHz Sine Wave, f
SAMPLE
= 200 kHz
f
IN
= 50 kHz Sine Wave, f
SAMPLE
= 200 kHz,
Typically –87 dB
f
IN
= 50 kHz Sine Wave, f
SAMPLE
= 200 kHz
fa = 9 kHz, fb
=
9.5 kHz, f
SAMPLE
= 200 kHz
Peak Harmonic or Spurious Noise
3
Intermodulation Distortion (IMD)
3
2nd Order Terms
3rd Order Terms
DC ACCURACY
Resolution
Minimum Resolution for which
No Missing Codes are Guaranteed
Relative Accuracy
3
Differential Nonlinearity
3
Positive Full-Scale Error
3
AD7895-2
Unipolar Offset Error
AD7895-10, AD7895-3 Only
Negative Full-Scale Error
3
Bipolar Zero Error
ANALOG INPUT
AD7895-10
Input Voltage Range
Input Resistance
AD7895-3
Input Voltage Range
Input Resistance
AD7895-2
Input Voltage Range
Input Current
REFERENCE INPUT
REF IN Input Voltage Range
Input Current
Input Capacitance
3
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN4
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Output Coding
AD7895-10, AD7895-3
AD7895-2
CONVERSION RATE
Conversion Time
Mode 1 Operation
Mode 2 Operation
5
Track/Hold Acquisition Time
3
POWER REQUIREMENTS
V
DD
I
DD
Power Dissipation
Power-Down Mode
I
DD
@ +25
°
C
T
MIN
to T
MAX
Power Dissipation @ +25
°
C
NOTES
1
Temperature ranges are as follows: A, B Versions: –40
°
C to +85
°
C.
2
Applies to Mode 1 operation. See section on “Operating Modes.”
3
See Terminology.
4
Sample tested @ +25
°
C to ensure compliance.
5
This 9.8
μ
s includes the “wake-up” time from standby. This “wake-up” time is timed from the rising edge of
CONVST
, whereas conversion is timed from the falling edge of
CONVST
, for
narrow
CONVST
pulse width the conversion time is effectively the “wake-up” time plus conversion time hence 9.8
μ
s. This can be seen from Figure 3. Note that if the
CONVST
pulse width
is greater than 6
μ
s then the effective conversion time will increase beyond 9.8
μ
s.
Specifications subject to change without notice.
–89
–89
dB typ
–87
–87
–87
–87
dB typ
dB typ
12
12
Bits
12
±
1
±
1
±
3
12
±
1
±
1
±
2
Bits
LSB max
LSB max
LSB max
Typically 0.4 LSB
±
3
±
2
LSB max
±
3
±
4
±
2
±
3
LSB max
LSB max
±
10
24
±
10
24
Volts
k
min
±
2.5
9
±
2.5
9
Volts
k
min
0 to +2.5
500
0 to +2.5
500
Volts
nA max
2.375/2.625
1
10
2.375/2.625
1
10
V min/V max
μ
A max
pF max
2.5 V
±
5%
2.4
0.8
±
10
10
2.4
0.8
±
10
10
V min
V max
μ
A max
pF ax
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
4.0
0.4
4.0
0.4
V min
V max
I
SOURCE
= 200
μ
A
I
SINK
= 1.6 mA
2s Complement
Straight (Natural) Binary
3.8
9.8
0.5
3.8
9.8
0.5
μ
s max
μ
s max
μ
s max
+5
4
20
+5
4
20
V nom
mA max
mW max
±
5% for Specified Performance
Digital Inputs @ V
DD
, V
DD
= 5 V
±
5%
Typically 16 mW
5
10
25
5
10
25
μ
A max
μ
A max
μ
W max
Digital Inputs @ GND, V
DD
= 5 V
±
5%
Digital Inputs @ GND, V
DD
= 5 V
±
5%
(V
DD
= +5 V, GND = 0 V, REF IN = +2.5 V.
All specifications T
MIN
to T
MAX
unless otherwise noted)
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