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參數(shù)資料
| 型號： | AD7896BN |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 2.7 V to 5.5 V, 12-Bit, 8 us ADC in 8-Pin SO/DIP |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, MO-095AA, DIP-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 367K |
| 代理商： | AD7896BN |
AD7896
REV. B
–5–
TERMINOLOGY
Relative Accuracy
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The end-
points of the transfer function are zero scale (
which is V
IN
=
AGND
+
1/2
LSB
) a point 1/2 LSB below the first code transi-
tion (00 . . . 000 to 00 . . . 001) and full scale (
which is V
IN
=
AGND
+
V
DD
–
1/2
LSB
), a point 1/2 LSB above the last code
transition (11 . . . 110 to 11 . . . 111).
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Unipolar Offset Error
This is the deviation of the first code transition (00 . . . 000 to
00 . . . 001) from the ideal V
IN
voltage (AGND + 1 LSB).
Positive Full-Scale Error
This is the deviation of the last code transition (11. . . 110 to
11 . . . 111) from the ideal (V
IN
= AGND + V
DD
– 1 LSB)
after the offset error has been adjusted out.
Track/Hold Acquisition Time
Track/hold acquisition time is the time required for the output
of the track/hold amplifier to reach its final value, within
±
1/2 LSB, after the end of conversion (
the point at which the
track/hold returns into track mode
). It also applies to a situation
where there is a step input change on the input voltage applied
to the selected V
IN
input of the AD7896. It means that the user
must wait for the duration of the track/hold acquisition time
after the end of conversion or after a step input change to V
IN
before starting another conversion, to ensure the part operates
to specification.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. The signal is the rms amplitude of
the fundamental. Noise is the sum of all nonfundamental signals
up to half the sampling frequency (f
S
/2), excluding dc. The ratio
is dependent on the number of quantization levels in the digiti-
zation process; the more levels, the smaller the quantization
noise. The theoretical signal to (noise + distortion) ratio for an
ideal N-bit converter with a sine wave input is given by:
S
ignal to
(
Noise + Distortion
)
=
(6.02
N
+
1.76)
dB
Thus for a 12-bit converter, this is 74 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7896, it is defined as:
THD
(
dB
)
=
20 log
V
2
2
+
V
3
2
+
V
4
V
1
2
+
V
5
2
+
V
6
2
where V
1
is the rms amplitude of the fundamental and V
2
, V
3
,
V
4
, V
5
and V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
S
/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for parts
where the harmonics are buried in the noise floor, it will be a
noise peak.
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
±
nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are
those for which neither m nor n are equal to zero. For example,
the second order terms include (fa + fb) and (fa – fb), while the
third order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb).
The AD7896 is tested using the CCIF standard where two in-
put frequencies near the top end of the input bandwidth are
used. In this case, the second order terms are usually distanced
in frequency from the original sine waves while the third order
terms are usually at a frequency close to the input frequencies.
As a result, the second and third order terms are specified sepa-
rately. The calculation of the intermodulation distortion is as
per the THD specification where it is the ratio of the rms sum of
the individual distortion products to the rms amplitude of the
fundamental expressed in dBs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7896BNZ | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Serial 8-Pin PDIP 制造商:Analog Devices 功能描述:A/D Converter (A-D) IC |
| AD7896BR | 功能描述:IC ADC 12BIT SRL T/H HS 8-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7896BR-REEL | 功能描述:IC ADC 12BIT SRL T/H HS 8-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7896BR-REEL7 | 制造商:Rochester Electronics LLC 功能描述:12-BIT SAMPLING A/D - Tape and Reel |
| AD7896BRZ | 功能描述:IC ADC 12BIT SRL T/H HS 8-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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