參數(shù)資料
型號: AD7912AUJ-REEL7
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: Circular Connector; No. of Contacts:5; Series:; Body Material:Aluminum Alloy; Connecting Termination:Solder; Connector Shell Size:16S; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:16S-8 RoHS Compliant: No
中文描述: 2-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝: MO-193BA, TSOT-8
文件頁數(shù): 10/32頁
文件大?。?/td> 386K
代理商: AD7912AUJ-REEL7
AD7912/AD7922
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 10 of 32
0
V
DD
GND
V
IN0
V
IN1
8
7
6
5
DOUT
1
CS
2
SCLK
3
DIN
4
AD7912/
AD7922
TOP VIEW
(Not to Scale)
8-LEAD MSOP
Figure 8. 8-Lead MSOP Pin Configuration
0
V
IN1
V
IN0
GND
V
DD
8
7
6
5
DIN
1
SCLK
2
CS
3
DOUT
4
AD7912/
AD7922
TOP VIEW
(Not to Scale)
8-LEAD TSOT
Figure 9. 8-Lead TSOT Pin Configuration
Table 5. Pin Function Descriptions
MSOP
Pin No.
Pin No.
1
4
TSOT
Mnemonic Function
DOUT
Data Out. Logic output. The conversion result from the AD7912/AD7922 is provided on this output as
a serial data stream. The bits are clocked out on the falling edge of the SCLK signal.
For the AD7922, the data stream consists of two leading zeros, the channel identifier bit that identifies
which channel the conversion result corresponds to, followed by the mode bit that indicates the
current mode of operation, followed by the 12 bits of conversion data with MSB first.
For the AD7912, the data stream consists of two leading zeros, the channel identifier bit that identifies
which channel the conversion result corresponds to, followed by the mode bit that indicates the
current mode of operation, followed by the 10 bits of conversion data with MSB first and two trailing
zeros.
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7912/AD7922 and framing the serial data transfer.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock
input is also used as the clock source for the AD7912/AD7922’s conversion process.
Data In. Logic input. The channel to be converted is provided on this input and is clocked into an
internal register on the falling edge of SCLK.
Analog Inputs. These two single-ended analog input channels are multiplexed into the on-chip
track-and-hold amplifier. The analog input channel to be converted is selected by writing to the third
MSB on the DIN pin. The input range is 0 to V
DD
.
Analog Ground. Ground reference point for all circuitry on the AD7912/AD7922. All analog input
signals should be referred to this GND voltage.
Power Supply Input. The V
DD
range for the AD7912/AD7922 is from 2.35 V to 5.25 V.
2
3
CS
3
2
SCLK
4
1
DIN
6, 5
7, 8
V
IN0
, V
IN1
7
6
GND
8
5
V
DD
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