參數(shù)資料
型號(hào)： AD7922ARM
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs
中文描述： 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝： MO-187AA, MSOP-8
文件頁數(shù)： 1/32頁
文件大?。?/td> 386K
代理商： AD7922ARM
2-Channel, 2.35 V to 5.25 V,
1 MSPS, 10-/12-Bit ADCs
AD7912/AD7922
FEATURES
Rev.
0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
Fast throughput rate: 1 MSPS
Specified for V
DD
of 2.35 V to 5.25 V
Low power:
4.8 mW typ at 1 MSPS with 3 V supplies
15.5mW typ at 1 MSPS with 5 V supplies
Wide input bandwidth:
71 dB minimum SNR at 100 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface:
SPI/QSPI/MICROWIRE/DSP compatible
Standby mode: 1 μA maximum
Daisy-chain mode
8-lead TSOT package
8-lead MSOP package
APPLICATIONS
Battery-powered systems:
Personal digital assistants
Medical instruments
Mobile communications
Instrumentation and control systems
Data acquisition systems
High speed modems
Optical sensors
GENERAL DESCRIPTION
The AD7912/AD7922
1
are 10-bit and 12-bit, high speed, low
power, 2-channel successive approximation ADCs, respectively.
The parts operate from a single 2.35 V to 5.25 V power supply
and feature throughput rates of up to 1 MSPS. The parts contain
a low noise, wide bandwidth track-and-hold amplifier, which
can handle input frequencies in excess of 6 MHz.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the devices to interface
with microprocessors or DSPs. The conversion rate is
determined by the SCLK signal. The input signal is sampled on
the falling edge of CS and the conversion is also initiated at this
point. The channel to be converted is selected through the DIN
pin, and the mode of operation is controlled by CS. The serial
data stream from the DOUT pin has a channel identifier bit and
mode identifier bit, which provide information about the
converted channel and the current mode of operation.
FUNCTIONAL BLOCK DIAGRAM
0
T/H
CONTROL LOGIC
10-/12-BIT
SUCCESSIVE
APPROXIMATION
ADC
GND
V
DD
AD7912/AD7922
V
IN0
V
IN1
SCLK
DOUT
CS
DIN
MUX
Figure 1.
Several AD7912/AD7922 can be connected together in a daisy
chain. The AD7912/AD7922 feature a daisy-chain mode that
allows the user to read the conversion results from the ADCs
contained in the chain. The AD7912/AD7922 use advanced
design techniques to achieve very low power dissipation at high
throughput rates. The reference for the part is taken internally
from V
DD
, thereby allowing the widest dynamic input range to
the ADC.
PRODUCT HIGHLIGHTS
1.
2-channel, 1 MSPS, 10-/12-bit ADCs in TSOT package.
2.
High throughput with low power consumption.
3.
Flexible power/serial clock speed management.
The conversion rate is determined by the serial clock. The
parts also feature a power-down mode to maximize power
efficiency at lower throughput rates. Average power
consumption is reduced when the power-down mode is
used while not converting. Current consumption is 1 μA
maximum and 50 nA typically when in power-down mode.
4.
Daisy-chain mode.
5.
No pipeline delay.
The parts feature a standard successive approximation ADC
with accurate control of the sampling instant via a CS input
and once-off conversion control.
1
Protected by U.S. Patent Number 6,681,332.
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