參數(shù)資料
型號(hào): AD7924
廠商: Analog Devices, Inc.
元件分類: ADC
英文描述: 4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP
中文描述: 4通道,1 MSPS的,8-/10-/12-Bit ADC的16與序列鉛TSSOP封裝
文件頁數(shù): 20/24頁
文件大?。?/td> 411K
代理商: AD7924
–20–
AD7904/AD7914/AD7924
REV. 0
INVALID DATA
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
DIN LINE HIGH FOR FIRST DUMMY CONVERSION
DATA IN TO CONTROL REGISTER
TO KEEP THE PART IN NORMAL MODE, LOAD
PM1 = PM0 = 1 IN CONTROL REGISTER
1
14
16
1
14
16
t
12
ALLOW
t
POWER
TO ELAPSE
IF IN SHUTDOWN AT POWER-ON,
PART BEGINS TO POWER UP ON
CS
RISING EDGE AS PM1 = PM0 = 1
PART IS IN
UNKNOWN MODE
AFTER POWER-ON
CS
SCLK
DOUT
DIN
Figure 14a. To Place AD7904/AD7914/AD7924 into Normal Mode after Supplies are First Applied
INVALID DATA
1
14
16
PART ENTERS SHUTDOWN ON
CS
RISING EDGE AS PM1 = PM0 = 0
PART IS IN
UNKNOWN MODE
AFTER POWER-ON
CS
SCLK
DOUT
DIN
DATA IN TO CONTROL REGISTER
CONTROL REGISTER IS LOADED ON
THE FIRST 12 CLOCKS. PM1 = 1, PM0 = 0
Figure 14b. To Place AD7904/AD7914/AD7924 into Full Shutdown Mode after Supplies are First Applied
INVALID DATA
INVALID DATA
DIN LINE HIGH FOR FIRST DUMMY CONVERSION
DATA IN TO CONTROL REGISTER
CONTROL REGISTER IS LOADED ON THE
FIRST 12 CLOCKS. PM1 = 0, PM0 = 1
1
14
16
1
14
16
PART IS IN
UNKNOWN MODE
AFTER POWER-ON
CS
SCLK
DOUT
DIN
PART ENTERS AUTO SHUTDOWN ON
CS
RISING EDGE AS PM1 = 0, PM0 = 1
Figure 14c. To Place AD7904/AD7914/AD7924 into Auto Shutdown Mode after Supplies are First Applied
POWER VERSUS THROUGHPUT RATE
By operating in Auto Shutdown mode on the AD7904/AD7914/
AD7924, the average power consumption of the ADC decreases
at lower throughput rates. Figure 15 shows how as the through-
put rate is reduced, the part remains in its shutdown state longer
and the average power consumption over time drops accordingly.
For example, if the AD7924 is operated in a continuous sam-
pling mode, with a throughput rate of 100 kSPS and an SCLK
of 20 MHz (V
DD
= 5 V), and the device is placed in Auto Shut-
down mode, i.e., if PM1 = 0 and PM0 = 1, then the power
consumption is calculated as follows:
The maximum power dissipation during normal operation is
13.5 mW (V
DD
= 5 V). If the power-up time from Auto Shutdown
is one dummy cycle, i.e., 1
μ
s, and the remaining conversion time is
another cycle, i.e., 1
μ
s, then the AD7924 can be said to dissipate
13.5 mW for 2
μ
s during each conversion cycle. For the remainder
of the conversion cycle, 8
μ
s, the part remains in shutdown.
The AD7924 can be said to dissipate 2.5
μ
W for the remaining 8
μ
s of
the conversion cycle. If the throughput rate is 100 kSPS, the cycle
time is 10
μ
s and the average power dissipated during each cycle is
(2/10)
×
(13.5 mW) + (8/10)
×
(2.5
μ
W) = 2.702 mW.
相關(guān)PDF資料
PDF描述
AD7924BRU 4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP
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