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參數(shù)資料
| 型號(hào)： | AD7928 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 8-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 20-Lead TSSOP |
| 中文描述： | 8通道，1 MSPS的，8-/10-/12-Bit與序列ADC的20引腳TSSOP封裝 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 607K |
| 代理商： | AD7928 |
AD7908/AD7918/AD7928
REV. A
concern, the power-down modes should be used between
conversions or bursts of several conversions to improve power
performance. (See the Modes of Operation section.)
5V
SUPPLY
0.1 F
10 F
AV
DD
SERIAL
INTERFACE
AD7908/
AD7918/
AD7928
C/ P
0.1 F
10 F
3V
SUPPLY
AGND
V
IN
0
V
IN
7
0V TO REF
IN
SCLK
DOUT
CS
DIN
V
DRIVE
NOTE: ALL UNUSED INPUT CHANNELS SHOULD BE CONNECTED TO AGND
AD780
2.5V
0.1 F
REF
IN
Figure 11. Typical Connection Diagram
Analog Input Selection
Any one of eight analog input channels may be selected for
conversion by programming the multiplexer with the address bits
ADD2
–
ADD0 in the Control Register. The channel configurations
are shown in Table II. The AD7908/AD7918/AD7928 may also be
configured to automatically cycle through a number of channels
as selected. The sequencer feature is accessed via the SEQ and
SHADOW bits in the Control Register. (See Table IV.)
The AD7908/AD7918/AD7928 can be programmed to continu-
ously convert on a selection of channels in ascending order. The
analog input channels to be converted on are selected through
programming the relevant bits in the SHADOW Register (see
Table V). The next serial transfer will then act on the sequence
programmed by executing a conversion on the lowest channel in
the selection. The next serial transfer will result in a conversion
on the next highest channel in the sequence, and so on.
It is not necessary to write to the Control Register once a
sequencer operation has been initiated. The WRITE bit must be
set to zero or the DIN line tied low to ensure the Control Register
is not accidently overwritten, or the sequence operation inter-
rupted. If the Control Register is written to at any time during
the sequence, then it must be ensured that the SEQ and SHADOW
bits are set to 1,0 to avoid interrupting the automatic conversion
sequence. This pattern will continue until such time as the
AD7908/AD7918/AD7928 is written to and the SEQ and
SHADOW bits are configured with any bit combination except
1,0. On completion of the sequence, the AD7908/AD7918/
AD7928 sequencer will return to the first selected channel in
the SHADOW Register and commence the sequence again.
Rather than selecting a particular sequence of channels, a num-
ber of consecutive channels beginning with Channel 0 may also
be programmed via the Control Register alone, without needing
to write to the SHADOW Register. This is possible if the SEQ
and SHADOW bits are set to 1,1. The channel address bits
ADD2 through ADD0 will then determine the final channel in
the consecutive sequence. The next conversion will be on Chan-
nel 0, then Channel 1, and so on until the channel selected via
the address bits ADD2 through ADD0 is reached. The cycle
will begin again on the next serial transfer, provided the WRITE
bit is set to low, or if high, that the SEQ and SHADOW bits are
set to 1,0; then the ADC will continue its preprogrammed auto-
matic sequence uninterrupted.
Regardless of which channel selection method is used, the 16-bit
word output from the AD7928 during each conversion will
always contain a leading zero, three channel address bits that
the conversion result corresponds to, followed by the 12-bit
conversion result; the AD7918 will output a leading zero, three
channel address bits that the conversion result corresponds to,
followed by the 10-bit conversion result and two trailing zeros; the
AD7908 will output a leading zero, three channel address bits that
the conversion result corresponds to, followed by the 8-bit conver-
sion result and four trailing zeros. (See the Serial Interface section.)
Digital Inputs
The digital inputs applied to the AD7908/AD7918/AD7928 are
not limited by the maximum ratings that limit the analog inputs.
Instead, the digital inputs applied can go to 7 V and are not
restricted by the AV
DD
+ 0.3 V limit as on the analog inputs.
Another advantage of SCLK, DIN, and
CS
not being restricted
by the AV
DD
+ 0.3 V limit is the fact that power supply sequenc-
ing issues are avoided. If
CS
, DIN, or SCLK are applied before
AV
DD
, there is no risk of latch-up as there would be on the analog
inputs if a signal greater than 0.3 V was applied prior to AV
DD
.
V
DRIVE
The AD7908/AD7918/AD7928 also have the V
DRIVE
feature.
V
DRIVE
controls the voltage at which the serial interface operates.
V
DRIVE
allows the ADC to easily interface to both 3 V and 5 V
processors. For example, if the AD7908/AD7918/AD7928 were
operated with an AV
DD
of 5 V, the V
DRIVE
pin could be powered
from a 3 V supply. The AD7908/AD7918/AD7928 have better
dynamic performance with an AV
DD
of 5 V while still being able
to interface to 3 V processors. Care should be taken to ensure
V
DRIVE
does not exceed AV
DD
by more than 0.3 V. (See the
Absolute Maximum Ratings.)
Reference
An external reference source should be used to supply the 2.5 V
reference to the AD7908/AD7918/AD7928. Errors in the refer-
ence source will result in gain errors in the AD7908/AD7918/
AD7928 transfer function and will add to the specified full-scale
errors of the part. A capacitor of at least 0.1 μF should be placed
on the REF
IN
pin. Suitable reference sources for the AD7908/
AD7918/AD7928 include the AD780, REF193, AD1582,
ADR03, ADR381, ADR391, and ADR421.
If 2.5 V is applied to the REF
IN
pin, the analog input range can
either be 0 V to 2.5 V or 0 V to 5 V, depending on the setting of
the RANGE bit in the Control Register.
MODES OF OPERATION
The AD7908/AD7918/AD7928 have a number of different
modes of operation. These modes are designed to provide flex-
ible power management options. These options can be chosen
to optimize the power dissipation/throughput rate ratio for dif-
fering application requirements. The mode of operation of the
AD7908/AD7918/AD7928 is controlled by the power manage-
ment bits, PM1 and PM0, in the Control Register, as detailed in
Table III. When power supplies are first applied to the AD7908/
AD7918/AD7928, care should be taken to ensure that the part is
placed in the required mode of operation. (See the Powering Up
the AD7908/AD7918/AD7928 section.)
–18–
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