- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10535 > AD7952BSTZ (Analog Devices Inc)IC ADC 14BIT DIFF 1MSPS 48-LQFP PDF資料下載
參數(shù)資料
| 型號： | AD7952BSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/32頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT DIFF 1MSPS 48-LQFP |
| 標準包裝： | 1 |
| 系列： | PulSAR® |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 260mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Data Sheet
AD7952
Rev. A | Page 23 of 32
OVDD should be set to the same level as the system interface.
Sufficient decoupling is required, consisting of at least a 10 μF
capacitor and a 100 nF capacitor with the 100 nF capacitors
placed as close as possible to the AD7952.
Power Sequencing
The AD7952 requires sequencing of the AVDD and DVDD
supplies. AVDD should come up prior to or simultaneously
with DVDD. This can be achieved using the configuration in
Figure 27 or sequencing the supplies in that manner. The
other supplies can be sequenced as desired as long as absolute
maximum ratings are observed. The AD7952 is very insensitive
to power supply variations on AVDD over a wide frequency
range, as shown in Figure 32.
80
75
1
10000
FREQUENCY (kHz)
PS
R
(d
B)
10
100
1000
70
65
60
55
50
45
40
35
30
EXT REF
INT REF
0
65
89-
0
31
Figure 32. AVDD PSRR vs. Frequency
Power Dissipation vs. Throughput
In impulse mode, the AD7952 automatically reduces its power
consumption at the end of each conversion phase. During the
acquisition phase, the operating currents are very low, which allows
a significant power savings when the conversion rate is reduced
(see Figure 33). This feature makes the AD7952 ideal for very
low power, battery-operated applications.
It should be noted that the digital interface remains active even
during the acquisition phase. To reduce the operating digital supply
currents even further, drive the digital inputs close to the power
rails (that is, OVDD and OGND).
1000
1
10
1000000
P
O
W
E
R
DI
S
IP
AT
IO
N
(m
W
)
100
10
100
1000
10000
100000
PDREF = PDBUF = HIGH
WARP MODE POWER
IMPULSE MODE POWER
06
589
-03
2
Figure 33. Power Dissipation vs. Sample Rate
Power Down
Setting PD = high powers down the AD7952, thus reducing
supply currents to their minimums, as shown in Figure 23. When
the ADC is in power-down, the current conversion (if any) is
completed and the digital bus remains active. To further reduce
the digital supply currents, drive the inputs to OVDD or OGND.
Power-down can also be programmed with the configuration
register. See the Software Configuration section for details. Note
that when using the configuration register, the PD input is a
don’t care and should be tied to either high or low.
CONVERSION CONTROL
The AD7952 is controlled by the CNVST input. A falling edge
on CNVST is all that is necessary to initiate a conversion. A
detailed timing diagram of the conversion process is shown in
Figure 34. Once initiated, it cannot be restarted or aborted,
even by the power-down input, PD, until the conversion is
completed. The CNVST signal operates independently of the CS
and RD signals.
BUSY
MODE
CONVERT
ACQUIRE
CONVERT
CNVST
t1
t2
t4
t3
t5
t6
t7
t8
0
65
89
-03
3
Figure 34. Basic Conversion Timing
Although CNVST is a digital signal, it should be designed with
special care with fast, clean edges, and levels with minimum
overshoot, undershoot, or ringing.
The CNVST trace should be shielded with ground, and a low value
(such as 50 Ω) serial resistor termination should be added close
to the output of the component that drives this line.
For applications where SNR is critical, the CNVST signal should
have very low jitter. This can be achieved by using a dedicated
oscillator for CNVST generation, or by clocking CNVST with a
high frequency, low jitter clock, as shown in Figure 27.
相關PDF資料 |
PDF描述 |
|---|---|
| DS34C87TM/NOPB | IC LINE DRIVER QUAD CMOS 16-SOIC |
| AD7951BCPZ | IC ADC 14BIT 1MSPS 48-LFCSP |
| VI-BTF-IV-F2 | CONVERTER MOD DC/DC 72V 150W |
| AD7951BSTZ | IC ADC 14BIT 1MSPS 48-LQFP |
| VI-B4P-MX-F1 | CONVERTER MOD DC/DC 13.8V 75W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7952BSTZRL | 功能描述:IC ADC 14BIT DIFF 1MSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD795AH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
| AD795BH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Feedback Operational Amplifier |
| AD795JN | 制造商:Analog Devices 功能描述:Operational Amplifier, Single AMP, Bipolar/JFET, 8 Pin, Plastic, DIP |
| AD795JR | 功能描述:IC OPAMP JFET 1.6MHZ LN 8SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:2,500 系列:Excalibur™ 放大器類型:J-FET 電路數(shù):1 輸出類型:- 轉(zhuǎn)換速率:45 V/µs 增益帶寬積:10MHz -3db帶寬:- 電流 - 輸入偏壓:20pA 電壓 - 輸入偏移:490µV 電流 - 電源:1.7mA 電流 - 輸出 / 通道:48mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 38 V，±2.25 V ~ 19 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復。