- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10164 > AD7980BRMZRL7 (Analog Devices Inc)ADC 16BIT 1MSPS LP 10-MSOP PDF資料下載
參數(shù)資料
| 型號： | AD7980BRMZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | ADC 16BIT 1MSPS LP 10-MSOP |
| 標準包裝： | 1,000 |
| 系列： | PulSAR® |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 9mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個偽差分，單極 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
Data Sheet
AD7980
Rev. C | Page 19 of 28
CS MODE 4-WIRE, WITHOUT BUSY INDICATOR
This mode is usually used when multiple AD7980s are
connected to an SPI-compatible digital host.
A connection diagram example using two AD7980s is shown in
Figure 35, and the corresponding timing is given in Figure 36.
With SDI high, a rising edge on CNV initiates a conversion,
selects the CS mode, and forces SDO to high impedance. In this
mode, CNV must be held high during the conversion phase and
the subsequent data readback (if SDI and CNV are low, SDO is
driven low). Prior to the minimum conversion time, SDI can be
used to select other SPI devices, such as analog multiplexers,
but SDI must be returned high before the minimum conversion
time elapses and then held high for the maximum conversion
time to avoid the generation of the busy signal indicator.
When the conversion is complete, the AD7980 enters the
acquisition phase and powers down. Each ADC result can be
read by bringing its SDI input low, which consequently outputs
the MSB onto SDO. The remaining data bits are then clocked by
subsequent SCK falling edges. The data is valid on both SCK
edges. Although the rising edge can be used to capture the data,
a digital host using the SCK falling edge allows a faster reading
rate provided it has an acceptable hold time. After the 16th SCK
falling edge or when SDI goes high, whichever is earlier, SDO
returns to high impedance and another AD7980 can be read.
06392-
019
DIGITAL HOST
CONVERT
CS2
CS1
CLK
DATA IN
AD7980 SDO
SDI
CNV
SCK
AD7980 SDO
SDI
CNV
SCK
Figure 35. 4-Wire CS Mode Without Busy Indicator Connection Diagram
06392-
020
tCONV
tCYC
AQUISITION
tACQ
tSCK
tSCKH
tSCKL
CONVERSION
SCK
CNV
tSSDICNV
tHSDICNV
SDO
D15
D13
D14
D1
D0
D15
D14
D1
D0
tHSDO
tEN
1
2
3
14
15
16
17
18
30
31
32
tDSDO
tDIS
SDI(CS1)
SDI(CS2)
Figure 36. 4-Wire CS Mode Without Busy Indicator Serial Interface Timing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 97-3108B-14S-1S | CONN PLUG RT ANG 3POS W/SOCKETS |
| MS3106R24-10P | CONN PLUG 7POS STRAIGHT W/PINS |
| CXS3106A282S | CONN PLUG 14POS STRGHT SKT |
| VE-221-IW-F4 | CONVERTER MOD DC/DC 12V 100W |
| VI-B34-MW-F2 | CONVERTER MOD DC/DC 48V 100W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7980-EP | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 1 MSPS PulSAR ADC in MSOP QFN |
| AD7980SRMZ-EP | 制造商:Analog Devices 功能描述:16-BIT, 1 MSPS PULSAR ADC IN MSOP/QFN - Rail/Tube |
| AD7980SRMZ-EP-RL7 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:ADC 16BIT 1MSPS LP 10-MSOP 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| AD7982 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit Lower Power |
| AD79821 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 500 kSPS PulSAR ADC in MSOP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。