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參數(shù)資料
| 型號： | AD7991YRJZ-1RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 4CH I2C SOT23-8 |
| 產(chǎn)品變化通告： | AD7991,5,9 Offset Error Change 17/Sept/2010 |
| 設計資源： | Using AD8599 as an Ultralow Distortion Driver for the AD7991 (CN0043) |
| 標準包裝： | 10,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 4.68mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應商設備封裝： | SOT-23-8 |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，單極 |
| 配用： | EVAL-AD7991EBZ-ND - BOARD EVAL FOR AD7991 |
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AD7991/AD7995/AD7999
Rev. B | Page 25 of 28
PLACING THE AD7991/AD7995/AD7999 INTO HIGH SPEED MODE
High speed mode communication commences after the master
addresses all devices connected to the bus with the master code,
00001XXX, to indicate that a high speed mode transfer is to
begin. No device connected to the bus is allowed to acknowledge
the high speed master code; therefore, the code is followed by a
NO ACK (see Figure 26). The master must then issue a repeated
start, followed by the device address and an R/W bit. The selected
device then acknowledges its address.
All devices continue to operate in high speed mode until the
master issues a stop condition. When the stop condition is
issued, the devices return to fast mode.
To guarantee performance above fSCL = 1.7 MHz, the user must
perform clock stretching—that is, the clock must be held high—for
2 μs after the ninth clock rising edge (see Figure 27). Therefore,
the clock must be held high for 2 μs after the device starts to power
up (see the Reading from the AD7991/AD7995/AD7999 section).
0
64
61
-02
8
SDA
ACK BY
ADC
START BY
MASTER
HS MODE MASTER CODE
SERIAL BUS ADDRESS BYTE
NO ACK
19
1
9
01
0
A0
X
1
0
SCL
0
1
X
Sr
FAST MODE
HIGH SPEED MODE
Figure 26. Placing the Part into High Speed Mode
06
46
1-
03
0
SDA
11
9
D10
D9
D8
A0
1
00
0
SCL
1
D11
1
D7
D6
D5
D2
D1
D0
D4
D3
SCL (CONTINUED)
SDA (CONTINUED)
CHID1 CHID0
R/W
9
START BY
MASTER
ACK BY
ADC
NO ACK BY
MASTER
ACK BY
MASTER
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
MOST SIGNIFICANT DATA BYTE FROM ADC
FRAME 3
LEAST SIGNIFICANT DATA BYTE FROM ADC
CLOCK HIGH TIME = 2s
Figure 27. Reading Two Bytes of Data from the Conversion Result Register in High Speed Mode for AD7991
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相關代理商/技術參數(shù) |
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|---|---|
| AD7992 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2-Channel, 12-Bit ADC with I2C Compatible Interface in 10-Lead MSOP |
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| AD7992BRM-0 | 制造商:Analog Devices 功能描述:ADC Single SAR 188ksps 12-bit Serial 10-Pin MSOP |
| AD7992BRM-0REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 188ksps 12-bit Serial 10-Pin MSOP T/R |
| AD7992BRM-1 | 制造商:Analog Devices 功能描述:ADC Single SAR 188ksps 12-bit Serial 10-Pin MSOP 制造商:Rochester Electronics LLC 功能描述:2-CHANNEL, 12-BIT ADC WITH 12C ITF I.C. - Bulk |
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