Temperature range for B version is 40°C to +125°C. Unless otherwise noted, " />
參數(shù)資料
型號: AD7994BRUZ-1
廠商: Analog Devices Inc
文件頁數(shù): 28/32頁
文件大小: 0K
描述: IC ADC 12BIT 4CHAN I2C 16TSSOP
標準包裝: 96
位數(shù): 12
采樣率(每秒): 188k
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.2mW
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
輸入數(shù)目和類型: 4 個單端,單極
AD7993/AD7994
Rev. 0 | Page 5 of 32
AD7994 SPECIFICATIONS
Temperature range for B version is 40°C to +125°C. Unless otherwise noted, VDD = 2.7 V to 5.5 V; REFIN = 2.5 V. For the AD7994-0,
all specifications apply for fSCL up to 400 kHz. For the AD7994-1, all specs apply for fSCL up to 3.4 MHz, unless otherwise noted.
TA = TMIN to TMAX.
Table 2.
Parameter
B Version
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE1
FIN = 10 kHz sine wave for fSCL from 1.7 MHz to
3.4 MHz
FIN = 1 kHz sine wave for fSCL up to 400 kHz
Signal-to-Noise + Distortion (SINAD)2
70.5
dB min
Signal-to-Noise Ratio (SNR)2
71
dB min
Total Harmonic Distortion (THD)2
–78
dB max
Peak Harmonic or Spurious Noise (SFDR)2
–79
dB max
Intermodulation Distortion (IMD)2
fa = 10.1 kHz, fb = 9.9 kHz for fSCL from 1.7 MHz
to 3.4 MHz
fa = 1.1 kHz, fb = 0.9 kHz for fSCL up to 400 kHz
Second-Order Terms
–90
dB typ
Third-Order Terms
–90
dB typ
Aperture Delay2
10
ns max
Aperture Jitter2
50
ps typ
Channel-to-Channel Isolation2
-90
dB typ
FIN = 108 Hz, see the Terminology section
Full-Power Bandwidth2
11
MHz typ
@ 3 dB
2
MHz typ
@ 0.1 dB
DC ACCURACY
Resolution
12
Bits
Integral Nonlinearity1, 2
±1
LSB max
±0.2
LSB typ
Differential Nonlinearity1, 2
+1/–0.9
LSB max
Guaranteed no missed codes to 12 bits
±0.2
LSB typ
Offset Error2
±4
LSB max
Mode 1 (CONVST Mode)
±6
LSB max
Mode 2 (Command Mode)
Offset Error Match2
±1
LSB max
Gain Error2
±2
LSB max
Gain Error Match2
±1
LSB max
ANALOG INPUT
Input Voltage Range
0 to REFIN
V
DC Leakage Current
± 1
A max
Input Capacitance
30
pF typ
REFERENCE INPUT
REFIN Input Voltage Range
1.2 to VDD
V min/V max
DC Leakage Current
± 1
A max
Input Impedance
69
k typ
During a converison
LOGIC INPUTS (SDA, SCL)
Input High Voltage, VINH
0.7 (VDD)
V min
Input Low Voltage, VINL
0.3 (VDD)
V max
Input Leakage Current, IIN
± 1
A max
VIN = 0 V or VDD
Input Capacitance, CIN 3
10
pF max
Input Hysteresis, VHYST
0.1 (VDD)
V min
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