參數(shù)資料
型號: AD7995YRJZ-0500RL7
廠商: Analog Devices Inc
文件頁數(shù): 19/28頁
文件大?。?/td> 0K
描述: IC ADC 10BIT 4CH SAR I2C SOT23-8
產(chǎn)品變化通告: AD7991,5,9 Offset Error Change 17/Sept/2010
設(shè)計資源: Using AD8599 as an Ultralow Distortion Driver for the AD7995 (CN0044)
標(biāo)準(zhǔn)包裝: 1
位數(shù): 10
采樣率(每秒): 1M
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 4.68mW
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8
供應(yīng)商設(shè)備封裝: SOT-23-8
包裝: 標(biāo)準(zhǔn)包裝
輸入數(shù)目和類型: 4 個單端,單極
產(chǎn)品目錄頁面: 780 (CN2011-ZH PDF)
配用: EVAL-AD7995EBZ-ND - BOARD EVAL FOR AD7995
其它名稱: AD7995YRJZ-0500RL7DKR
AD7991/AD7995/AD7999
Rev. B | Page 26 of 28
MODE OF OPERATION
The AD7991/AD7995/AD7999 powers up in shutdown mode.
After the master addresses the AD7991/AD7995/AD7999 with
the correct I2C address, the ADC acknowledges the address. In
response, the AD7991/AD7995/AD7999 power up.
During this wake up time, the AD7991/AD7995/AD7999 exit
shutdown mode and begin to acquire the analog input (acquisition
phase). By default, all channels are selected. Which channels
are converted depends on the status of the channel bits in the
configuration register.
When the read address is acknowledged, the ADC outputs two
bytes of conversion data. The first byte contains four status bits
and the four MSBs of the conversion result. The status bits
contain two leading 0s and two channel-identifier bits. After
this first byte, the AD7991/AD7995/AD7999 outputs the
second byte of the conversion result. For the AD7991, this
second byte contains the lower eight bits of conversion data. For
the AD7995, this second byte contains six bits of conversion
data plus two trailing 0s. For the AD7999, this second byte
contains four bits of conversion data and four trailing 0s.
The master then sends a NO ACK to the AD7991/AD7995/
AD7999, as long as no further reads are required. If the master
instead sends an ACK to the AD7991/AD7995/AD7999, the
ADC powers up and completes another conversion. When
more than one channel bit has been set in the configuration
register, this conversion is performed on the second channel in
the selected sequence. If only one channel is selected, the ADC
converts again on the selected channel.
06
46
1-
02
9
Sr
RA
A
SECOND DATA BYTE
(LSB)
FIRST DATA BYTE
(MSB)
7-BIT ADDRESS
SCL
SDA
A
11
9
Sr/P
ACK. BY
ADC
ACK. BY
MASTER
NO ACK. BY
MASTER
Figure 28. Mode of Operation, Single-Channel Conversion
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