REV. D
AD8002
–13–
Single-Ended-to-Differential Driver Using an AD8002
The two halves of an AD8002 can be configured to create a
single-ended-to-differential high-speed driver with a –3dB
bandwidth in excess of 200 MHz, as shown in Figure 11. Although
the individual op amps are each current feedback, the overall
architecture yields a circuit with attributes normally associated
with voltage feedback amplifiers, while offering the speed advan-
tages inherent in current feedback amplifiers. In addition, the gain
of the circuit can be changed by varying a single resistor, RF,
which is often not possible in a dual op amp differential driver.
50
OUTPUT #1
50
OUTPUT #2
RG
511
RF 511
CC 0.5–1.5pF
1/2
AD8002
1/2
AD8002
OP AMP #1
OP AMP #2
VIN
RA
511
RA
511
RB
511
RB
Figure 11. Differential Line Driver
The current feedback nature of the op amps, in addition to
enabling the wide bandwidth, provides an output drive of more
than 3 V p-p into a 20
load for each output at 20 MHz. On the
other hand, the voltage feedback nature provides symmetrical
high impedance inputs and allows the use of reactive compo-
nents in the feedback network.
The circuit consists of the two op amps, each configured as a
unity gain follower by the 511
RA feedback resistors between
each op amp’s output and inverting input. The output of each op
amp has a 511
R
B resistor to the inverting input of the other
op amp. Thus, each output drives the other op amp through a
unity gain inverter configuration. By connecting the two amplifi-
ers as cross-coupled inverters, their outputs are freed to be equal
and opposite, assuring zero-output common-mode voltage.
With this circuit configuration, the common-mode signal of the
outputs is reduced. If one output moves slightly higher, the nega-
tive input to the other op amp drives its output to go slightly
lower and thus preserves the symmetry of the complementary
outputs, which reduces the common-mode signal. The common-
mode output signal was measured to be –50 dB at 1 MHz.
Looking at this configuration overall, there are two high imped-
ance inputs (the + inputs of each op amp), two low impedance
outputs, and high open-loop gain. If we consider the two nonin-
verting inputs and just the output of Op Amp #2, the structure
looks like a voltage feedback op amp having two symmetrical,
high-impedance inputs, and one output. The +input to Op Amp
#2 is the noninverting input (it has the same polarity as Output
#2) and the +input to Amplifier #1 is the inverting input (oppo-
site polarity of Output #2).
With a feedback resistor RF, an input resistor RG, and grounding
of the +input of Op Amp #2, a feedback amplifier is formed.
This configuration is just like a voltage feedback amplifier in an
inverting configuration if only Output #2 is considered. The
addition of Output #1 makes the amplifier differential output.
The differential gain of this circuit is:
G
R
F
G
A
B
=×
+
1
The RF/RG term is the gain of the overall op amp configuration
and is the same as for an inverting op amp except for the polarity.
If Output #1 is used as the output reference, the gain is posi-
tive. The 1 + RA/RB term is the noise gain of each individual op
amp in its noninverting configuration.
The resulting architecture offers several advantages. First, the gain
can be changed by changing a single resistor. Changing either
RF or RG will change the gain as in an inverting op amp circuit.
For most types of differential circuits, more than one resistor
must be changed to change gain and still maintain good CMR.
Reactive elements can be used in the feedback network. This is
in contrast to current feedback amplifiers that restrict the use of
reactive elements in the feedback. The circuit described requires
about 0.9 pF of capacitance in shunt across RF in order to optimize
peaking and realize a –3 dB bandwidth of more than 200 MHz.
The peaking exhibited by the circuit is very sensitive to the value
of this capacitor. Parasitics in the board layout on the order of
tenths of picofarads will influence the frequency response and
the value required for the feedback capacitor, so a good lay-
out is essential.
The shunt capacitor type selection is also critical. A good micro-
wave type chip capacitor with high Q was found to yield best
performance. The part selected for this circuit was a muRata
Erie part number MA280R9B.
The distortion was measured at 20 MHz with a 3 V p-p input
and a 100
load on each output. For Output #1 the distortion
is –37 dBc and –41 dBc for the second and third harmonics
respectively. For Output #2 the second harmonic is –35 dBc
and the third harmonic is –43 dBc.
6
–4
–14
1M
10M
1G
100M
–6
–8
–10
–12
–2
0
2
4
OUTPUT
–
dB
FREQUENCY – Hz
CC = 0.9pF
OUT+
OUT–
Figure 12. Differential Driver Frequency Response