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| 型號： | AD8005ARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP CF ULP LDIST 10MA 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 98 |
| 放大器類型： | 電流反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1500 V/µs |
| -3db帶寬： | 270MHz |
| 電流 - 輸入偏壓： | 5µA |
| 電壓 - 輸入偏移： | 5000µV |
| 電流 - 電源： | 400µA |
| 電流 - 輸出 / 通道： | 10mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 12 V，±2 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 773 (CN2011-ZH PDF) |
Data Sheet
AD8005
Amp 1 has its +input driven with the ac-coupled input signal
while the +input of Amp 2 is connected to a bias level of +2.5 V.
Thus the input of Amp 2 is driven to virtual +2.5 V by its output.
Therefore, Amp 1 is configured for a noninverting gain of five,
(1 + RF1/RG), because RG is connected to the virtual +2.5 V of
the –input of Amp 2.
When the +input of Amp 1 is driven with a signal, the same
signal appears at the input of Amp 1. This signal serves as an
input to Amp 2 configured for a gain of 5, (RF2/RG). Thus the
two outputs move in opposite directions with the same gain and
create a balanced differential signal.
This circuit can be simplified to create a bipolar in/bipolar out
single-ended to differential converter. Obviously, a single supply
is no longer adequate and the VS pins must now be powered
with 5 V. The +input to Amp 2 is tied to ground. The ac coupling
on the +input of Amp 1 is removed and the signal can be fed
directly into Amp 1.
LAYOUT CONSIDERATIONS
In order to achieve the specified high-speed performance of the
AD8005, the user must be attentive to board layout and component
selection. Proper RF design techniques and selection of components
with low parasitics are necessary.
The printed circuit board (PCB) must have a ground plane that
covers all unused portions of the component side of the board.
This provides a low impedance path for signals flowing to ground.
Remove the ground plane from the area under and around the
chip (leave about 2 mm between the pin contacts and the
ground plane). This helps to reduce stray capacitance. If both
signal tracks and the ground plane are on the same side of the
PCB, also leave a 2 mm gap between ground plane and track.
Figure 34. Inverting and Nonconverting Configurations
Chip capacitors have low parasitic resistance and inductance and
are suitable for supply bypassing (see Figure 34). Make sure that
one end of the capacitor is within 1/8 inch of each power pin
with the other end connected to the ground plane. An additional
large (0.47 F 10 F) tantalum electrolytic capacitor must also
be connected in parallel. This capacitor supplies current for fast,
large signal changes at the output. It must not necessarily be as
close to the power pin as the smaller capacitor.
Locate the feedback resistor close to the inverting input pin in
order to keep the stray capacitance at this node to a minimum.
Capacitance variations of less than 1.5 pF at the inverting input
significantly affect high-speed performance.
Use stripline design techniques for long signal traces (that is,
greater than about 1 inch). Striplines must have a characteristic
impedance of either 50 Ω or 75 Ω. For the stripline to be effective,
correct termination at both ends of the line is necessary.
Table 5. Typical Bandwidth vs. Gain Setting Resistors
Gain
RF
RG
RT
Small Signal 3 dB BW
(MHz), VS = ±5 V
1
1.49 kΩ
52.3
120 MHz
10
1 kΩ
100 Ω
60 MHz
+1
2.49 kΩ
∞
49.9 Ω
270 MHz
+2
2.49 kΩ
49.9 Ω
170 MHz
+10
499 Ω
56.2 Ω
49.9 Ω
40 MHz
INCREASING FEEDBACK RESISTORS
Unlike conventional voltage feedback op amps, the choice of
feedback resistor has a direct impact on the closed-loop bandwidth
and stability of a current feedback op amp circuit. Reducing the
resistance below the recommended value makes the amplifier
more unstable. Increasing the size of the feedback resistor
reduces the closed-loop bandwidth.
Figure 35. Saving Power by Increasing Feedback Resistor Network
In power-critical applications where some bandwidth can be
sacrificed, increasing the size of the feedback resistor yields
significant power savings. A good example of this is the gain of
+10 case. Operating from a bipolar supply (±5 V), the quiescent
current is 475 A (excluding the feedback network). The recom-
mended feedback and gain resistors are 499 Ω and 56.2 Ω
respectively. In order to drive an rms output voltage of 2 V, the
output must deliver a current of 3.6 mA to the feedback network.
Increasing the size of the resistor network by a factor of 10, as
shown in Figure 35, reduces this current to 360 A; however,
the closed loop bandwidth decreases to 20 MHz.
C1
0.01F
C2
0.01F
C3
10F
C4
10F
INVERTING CONFIGURATION
VIN
RG
RT
RF
RO
VOUT
+VS
–VS
C1
0.01F
C2
0.01F
C3
10F
C4
10F
VIN
RG
RT
RF
RO
NONINVERTING CONFIGURATION
VOUT
+VS
–VS
12146-
034
360A (rms)
VOUT
2V (rms)
+5V
4.99kΩ
562Ω
–5V
AD8005
VIN
0.2V (rms)
QUIESCENT CURRENT
475A (MAX)
12146-
035
Rev. B | Page 11 of 16
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| AD8005ARZ-REEL | 功能描述:IC OPAMP CF ULP LDIST 10MA 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 放大器類型:電壓反饋 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:33 V/µs 增益帶寬積:20MHz -3db帶寬:30MHz 電流 - 輸入偏壓:2nA 電壓 - 輸入偏移:3000µV 電流 - 電源:2.5mA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 16.5 V，±2.25 V ~ 8.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:帶卷 (TR) |
| AD8005ARZ-REEL7 | 功能描述:IC OPAMP CF ULP LDIST 10MA 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:通用 電路數(shù):2 輸出類型:滿擺幅 轉(zhuǎn)換速率:1.8 V/µs 增益帶寬積:6.5MHz -3db帶寬:4.5MHz 電流 - 輸入偏壓:5nA 電壓 - 輸入偏移:100µV 電流 - 電源:65µA 電流 - 輸出 / 通道:35mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 5.25 V，±0.9 V ~ 2.625 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:10-MSOP 包裝:管件 |
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