參數(shù)資料
型號(hào): AD8013AR-14
廠商: Analog Devices Inc
文件頁數(shù): 12/12頁
文件大?。?/td> 0K
描述: IC OPAMP SINGLE SUPPLY 14-SOIC
標(biāo)準(zhǔn)包裝: 56
應(yīng)用: 電流反饋
電路數(shù): 3
-3db帶寬: 140MHz
轉(zhuǎn)換速率: 1000 V/µs
電流 - 電源: 3.5mA
電流 - 輸出 / 通道: 30mA
電壓 - 電源,單路/雙路(±): 4.2 V ~ 13 V,±2.1 V ~ 6.5 V
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOICN
包裝: 管件
–9–
REV. A
AD8013
FREQUENCY – Hz
1M
1G
10M
CLOSED-LOOP
GAIN
(NORMALIZED)
dB
100M
–6
+1
0
–1
–2
–3
–4
–5
180
90
0
–90
PHASE
SHIFT
Degrees
G = –10
RL = 150
VS = ±5V
VS = +5V
VS = ±5V
GAIN
PHASE
Figure 27. Closed-Loop Gain and Phase vs. Frequency,
G = –10, RL = 150
To estimate the –3 dB bandwidth for closed-loop gains of 2 or
greater, for feedback resistors not listed in the following table,
the following single pole model for the AD8013 may be used:
ACL
G
1
+ SC
T ( RF + Gn rin )
where:
CT = transcapacitance
1 pF
RF = feedback resistor
G = ideal closed loop gain
Gn = 1 +
R
F
R
G
= noise gain
rin = inverting input resistance
150
ACL = closed loop gain
The –3 dB bandwidth is determined from this model as:
f3
1
2
π C
T ( RF + Gn rin )
This model will predict –3 dB bandwidth to within about 10%
to 15% of the correct value when the load is 150
and V
S =
±5 V. For lower supply voltages there will be a slight decrease in
bandwidth. The model is not accurate enough to predict either
the phase behavior or the frequency response peaking of the
AD8013.
It should be noted that the bandwidth is affected by attenuation
due to the finite input resistance. Also, the open-loop output
resistance of about 12
reduces the bandwidth somewhat when
driving load resistors less than about 250
. (Bandwidths will
be about 10% greater for load resistances above a few hundred
ohms.)
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and Feedback
Resistor, RL = 150 (SOIC)
VS – Volts
Gain
RF – Ohms
BW – MHz
±5
+1
2000
230
+2
845 (931)
150 (135)
+10
301
80
–1
698 (825)
140 (130)
–10
499
85
+5
+1
2000
180
+2
887 (931)
120 (130)
+10
301
75
–1
698 (825)
130 (120)
–10
499
80
Driving Capacitive Loads
When used in combination with the appropriate feedback
resistor, the AD8013 will drive any load capacitance without
oscillation. The general rule for current feedback amplifiers is
that the higher the load capacitance, the higher the feedback
resistor required for stable operation. Due to the high open-loop
transresistance and low inverting input current of the AD8013,
the use of a large feedback resistor does not result in large closed-
loop gain errors. Additionally, its high output short circuit current
makes possible rapid voltage slewing on large load capacitors.
For the best combination of wide bandwidth and clean pulse
response, a small output series resistor is also recommended.
Table II contains values of feedback and series resistors which
result in the best pulse responses. Figure 29 shows the AD8013
driving a 300 pF capacitor through a large voltage step with
virtually no overshoot. (In this case, the large and small signal
pulse responses are quite similar in appearance.)
General
The AD8013 is a wide bandwidth, triple video amplifier that
offers a high level of performance on less than 4.0 mA per
amplifier of quiescent supply current. The AD8013 uses a
proprietary enhancement of a conventional current feedback
architecture, and achieves bandwidth in excess of 200 MHz with
low differential gain and phase errors, making it an extremely
efficient video amplifier.
The AD8013’s wide phase margin coupled with a high output
short circuit current make it an excellent choice when driving
any capacitive load. High open-loop gain and low inverting
input bias current enable it to be used with large values of
feedback resistor with very low closed-loop gain errors.
It is designed to offer outstanding functionality and performance
at closed-loop inverting or noninverting gains of one or greater.
Choice of Feedback & Gain Resistors
Because it is a current feedback amplifier, the closed-loop band-
width of the AD8013 may be customized using different values
of the feedback resistor. Table I shows typical bandwidths at
different supply voltages for some useful closed-loop gains when
driving a load of 150
.
The choice of feedback resistor is not critical unless it is
important to maintain the widest, flattest frequency response.
The resistors recommended in the table are those (chip
resistors) that will result in the widest 0.1 dB bandwidth without
peaking. In applications requiring the best control of bandwidth,
1% resistors are adequate. Package parasitics vary between the
14-pin plastic DIP and the 14-pin plastic SOIC, and may result
in a slight difference in the value of the feedback resistor used to
achieve the optimum dynamic performance. Resistor values and
widest bandwidth figures are shown in parenthesis for the SOIC
where they differ from those of the DIP. Wider bandwidths than
those in the table can be attained by reducing the magnitude of
the feedback resistor (at the expense of increased peaking),
while peaking can be reduced by increasing the magnitude of
the feedback resistor.
Increasing the feedback resistor is especially useful when driving
large capacitive loads as it will increase the phase margin of the
closed-loop circuit. (Refer to the section on driving capacitive
loads for more information.)
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