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參數(shù)資料
| 型號： | AD8033AKSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 23/25頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP VF R-R LN LP SC70-5 |
| 產(chǎn)品培訓模塊： | Op Amp Basics |
| 標準包裝： | 10,000 |
| 系列： | FastFET™ |
| 放大器類型： | 電壓反饋 |
| 電路數(shù)： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 80 V/µs |
| -3db帶寬： | 80MHz |
| 電流 - 輸入偏壓： | 1.5pA |
| 電壓 - 輸入偏移： | 1000µV |
| 電流 - 電源： | 3.3mA |
| 電流 - 輸出 / 通道： | 60mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 24 V，±2.5 V ~ 12 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-TSSOP（5 引線），SC-88A，SOT-353 |
| 供應商設備封裝： | SC-70-5 |
| 包裝： | 帶卷 (TR) |
AD8033/AD8034
Rev. D | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Rating
Supply Voltage
26.4 V
Power Dissipation
See Figure 5
If the rms signal levels are indeterminate, consider the worst case,
when VOUT = VS/4 for RL to midsupply
PD = (VS × IS) + (VS/4)2/RL
In single-supply operation with RL referenced to VS, worst case
is VOUT = VS/2.
Common-Mode Input Voltage
26.4 V
Differential Input Voltage
1.4 V
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
40°C to +85°C
Lead Temperature (Soldering 10 sec)
300°C
AMBIENT TEMPERATURE (°C)
–60
–20
–40
100
60
80
2.0
1.5
M
AX
IM
UM
P
O
W
E
R
DI
S
IP
AT
IO
N
(
W
)
1.0
0.5
0
SOIC-8
SOT-23-8
SC70-5
40
020
02
92
4-
0
05
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8033/AD8034
packages is limited by the associated rise in junction temperature
(TJ) on the die. The plastic that encapsulates the die locally
reaches the junction temperature. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the AD8033/
AD8034. Exceeding a junction temperature of 175°C for an
extended period can result in changes in silicon devices, potentially
causing failure.
Figure 5. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θJA. Care must be taken to minimize parasitic
capacitances at the input leads of high speed op amps as discussed
in the Layout, Grounding, and Bypassing Considerations section.
Figure 5 shows the maximum power dissipation in the package
vs. the ambient temperature for the 8-lead SOIC (125°C/W),
5-lead SC70 (210°C/W), and 8-lead SOT-23 (160°C/W) packages
on a JEDEC standard 4-layer board. θJA values are approximations.
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and the total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current for
the AD8033/AD8034 will likely cause catastrophic failure.
TJ = TA + (PD × θJA)
PD is the sum of the quiescent power dissipation and the power
dissipated in the package due to the load drive for all outputs.
The quiescent power is the voltage between the supply pins (VS)
times the quiescent current (IS). Assuming the load (RL) is
referenced to midsupply, the total drive power is VS/2 × IOUT,
some of which is dissipated in the package and some in the load
(VOUT × IOUT). The difference between the total drive power and
the load power is the drive power dissipated in the package
ESD CAUTION
PD = Quiescent Power + (Total Drive Power Load Power)
PD = [VS × IS] + [(VS/2) × (VOUT/RL)] [VOUT2/RL]
RMS output voltages should be considered. If RL is referenced
to VS, as in single-supply operation, the total drive power is
VS × IOUT.
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