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參數(shù)資料
| 型號(hào)： | AD8037ARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP VF ULDIST LN 70MA 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 98 |
| 系列： | CLAMPIN™ |
| 放大器類型： | 電壓反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1500 V/µs |
| -3db帶寬： | 270MHz |
| 電流 - 輸入偏壓： | 3µA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 18.5mA |
| 電流 - 輸出 / 通道： | 70mA |
| 電壓 - 電源，單路/雙路(±)： | ±3 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 769 (CN2011-ZH PDF) |
| 配用： | AD8037-EB-ND - BOARD EVAL FOR AD8037 |
AD8036/AD8037
REV. B
–19–
The circuit uses an AD8037 operating at a gain of two with an
AD811 to boost the output to the
±12 V range. The AD811 was
chosen for its ability to operate with
±15 V supplies and its high
slew rate.
R1 and R2 act as a level shifter to make the TTL signal levels be
approximately symmetrical above and below ground. This ensures
that both the high and low logic levels will be clamped by the
AD8037. For well controlled signal levels in the output pulse,
the high and low output levels should result from the clamping
action of the AD8037 and not be controlled by either the high
or low logic levels passing through a linear amplifier. For good
rise and fall times at the output pulse, a logic family with high
speed edges should be used.
The high logic levels are clamped at two times the voltage at VH,
while the low logic levels are clamped at two times the voltage
at VL. The output of the AD8037 is amplified by the AD811
operating at a gain of 5. The overall gain of 10 will cause the
high output level to be 10 times the voltage at VH, and the low
output level to be 10 times the voltage at VL.
High Speed, Full-Wave Rectifier
The clamping inputs are additional inputs to the input stage of
the op amp. As such they have an input bandwidth comparable
to the amplifier inputs and lend themselves to some unique
functions when they are driven dynamically.
Figure 12 is a schematic for a full-wave rectifier, sometimes
called an absolute value generator. It works well up to 20 MHz
and can operate at significantly higher frequencies with some
degradation in performance. The distortion performance is sig-
nificantly better than diode based full-wave rectifiers, especially
at high frequencies.
VOUT = VIN
+5V
RF
274
–5V
100
VH
VL
VIN
0.1 F10 F
AD8037
0.1 F
10 F
RG
274
Figure 12. Full-Wave Rectifier
TTLIN
+15V
PULSE
OUT
VH
10
VL
10
–15V
+5V
274
–5V
100
VH
VL
0.1 F
10 F
0.1 F
AD8037
0.1 F10 F
VH
0.1 F
VL
274
1.3k
200
100
AD811
–15V
0.1 F10 F
0.1 F
10 F
604
150
Figure 11. Programmable Pulse Generator
The circuit is configured as an inverting amplifier with a gain
of one. The input drives the inverting amplifier and also directly
drives VL, the lower level clamping input. The high level clamp-
ing input, VH, is left floating and plays no role in this circuit.
When the input is negative, the amplifier acts as a regular unity-
gain inverting amplifier and outputs a positive signal at the same
amplitude as the input with opposite polarity. VL is driven nega-
tive by the input, so it performs no clamping action, because the
positive output signal is always higher than the negative level
driving VL.
When the input is positive, the output result is the sum of two
separate effects. First, the inverting amplifier multiplies the input
by –1 because of its unity-gain inverting configuration. This
effectively produces an offset as explained above, but with a
dynamic level that is equal to –1 times the input.
Second, although the positive input is grounded (through 100
),
the output is clamped at two times the voltage applied to VL (a
positive, dynamic voltage in this case). The factor of two is
because the noise gain of the amplifier is two.
The sum of these two actions results in an output that is equal
to unity times the input signal for positive input signals, see Fig-
ure 13. For a input/output scope photo with an input signal of
20 MHz and amplitude
±1 V, see Figure 14.
INPUT
FULL WAVE
RECTIFIED
OUTPUT
LOWER
CLAMPING
LEVEL WITH
NO NEG INPUT
OUTPUT
LOWER
CLAMPING
LEVEL
–1
INPUT
Figure 13.
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| AD8037ARZ-REEL | 功能描述:IC OPAMP VF ULDIST LN 70MA 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:CLAMPIN™ 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類型:J-FET 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:3.5 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:30pA 電壓 - 輸入偏移:2000µV 電流 - 電源:200µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| AD8037ARZ-REEL7 | 功能描述:IC OPAMP VF ULDIST LN 70MA 8SOIC RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:CLAMPIN™ 標(biāo)準(zhǔn)包裝:150 系列:- 放大器類型:音頻 電路數(shù):2 輸出類型:- 轉(zhuǎn)換速率:5 V/µs 增益帶寬積:12MHz -3db帶寬:- 電流 - 輸入偏壓:100nA 電壓 - 輸入偏移:500µV 電流 - 電源:6mA 電流 - 輸出 / 通道:50mA 電壓 - 電源，單路/雙路(±):4 V ~ 32 V，±2 V ~ 16 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
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