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參數(shù)資料
| 型號： | AD8045ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/25頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP VF ULDIST LN 8LFCSP |
| 產(chǎn)品培訓模塊： | Practical Guide High Speed PCB Layout |
| 標準包裝： | 1 |
| 放大器類型： | 電壓反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 1350 V/µs |
| -3db帶寬： | 1GHz |
| 電流 - 輸入偏壓： | 2µA |
| 電壓 - 輸入偏移： | 200µV |
| 電流 - 電源： | 16mA |
| 電流 - 輸出 / 通道： | 70mA |
| 電壓 - 電源，單路/雙路(±)： | 3.3 V ~ 12 V，±1.65 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VFDFN 裸露焊盤，CSP |
| 供應商設備封裝： | 8-LFCSP-VD（3x3） |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 769 (CN2011-ZH PDF) |
| 其它名稱： | AD8045ACPZ-REEL7DKR |
AD8045
Rev. A | Page 17 of 24
THEORY OF OPERATION
The AD8045 is a high speed voltage feedback amplifier fabri-
cated on ADI’s second generation eXtra Fast Complementary
Bipolar (XFCB) process. An H-bridge input stage is used to
attain a 1400 V/s slew rate and low distortion in addition to a
low 3 nV/√Hz input voltage noise. Supply current and offset
voltage are laser trimmed for optimum performance.
FREQUENCY RESPONSE
The AD8045’s open-loop response over frequency can be
approximated by the integrator response shown in Figure 63.
fCROSSOVER = 400MHz
FREQUENCY (MHz)
V
OUT
/V
IN
(dB)
0
1
10
100
f
1000
VOUT/VIN =
fCROSSOVER
VIN
VOUT
04814-0-008
Figure 63. Open-Loop Response
The closed-loop transfer function for the noninverting configu-
ration is shown in Figure 64 and is written as
()
G
CROSSOVER
G
F
G
CROSSOVER
IN
OUT
R
f
R
f
V
×
+
×
=
π
2
s
)
(
π
2
where:
s is (2 πj)f.
fCROSSOVER is the frequency where the amplifier’s open-loop gain
equals 1 (0 dB).
DC gain is therefore
()
G
F
G
IN
OUT
R
V
+
=
Closed-loop 3 dB bandwidth equals
()
F
G
CROSSOVER
IN
OUT
R
f
V
+
×
=
The closed-loop bandwidth is inversely proportional to the
noise gain of the op amp circuit, (RF + RG)/RG. This simple
model can be used to predict the 3 dB bandwidth for noise
gains above +2. The actual bandwidth of circuits with noise
gains at or below +2 is higher due to the influence of other
poles present in the real op amp.
04814-0-009
RG
RF
VIN
VOUT
RS
+–
Figure 64. Noninverting Configuration
DC ERRORS
Figure 65 shows the dc error contributions. The total output
error voltage is
+
+
=
+
G
F
G
OS
F
B
G
F
G
S
B
(ERROR)
OUT
R
V
R
I
R
I
V
04814-0-010
RG
RF
VOS
VOUT
RS
+–
IB+
IB–
Figure 65. Amplifier DC Errors
The voltage error due to IB+ and IB is minimized if RS = RF||RG.
To include the effects of common-mode and power supply
rejection, model VOS as
CMR
V
PSR
V
CM
S
OS
nom
+
+
=
where:
nom
os
V
is the offset voltage at nominal conditions.
ΔVS is the change in the power supply voltage from nominal
conditions.
PSR
is the power supply rejection.
CMR is the common-mode rejection.
ΔVCM is the change in common-mode voltage from nominal
conditions.
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