參數(shù)資料
型號(hào): AD8067ART-R2
廠商: Analog Devices Inc
文件頁數(shù): 23/25頁
文件大小: 0K
描述: IC OPAMP VF R-R PREC LN SOT23-5
標(biāo)準(zhǔn)包裝: 1
系列: FastFET™
放大器類型: 電壓反饋
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 640 V/µs
-3db帶寬: 54MHz
電流 - 輸入偏壓: 0.6pA
電壓 - 輸入偏移: 200µV
電流 - 電源: 6.6mA
電流 - 輸出 / 通道: 26mA
電壓 - 電源,單路/雙路(±): 5 V ~ 24 V,±2.5 V ~ 12 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SC-74A,SOT-753
供應(yīng)商設(shè)備封裝: SOT-23-5
包裝: 剪切帶 (CT)
其它名稱: AD8067ART-R2CT
AD8067
Data Sheet
Rev. B | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Rating
Supply Voltage
26.4 V
Power Dissipation
Common-Mode Input Voltage
VEE – 0.5 V to VCC + 0.5 V
Differential Input Voltage
1.8 V
Storage Temperature Range
–65°C to +125°C
Operating Temperature Range
–40°C to +85°C
Lead Temperature (Soldering 10 sec)
300°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The associated raise in junction temperature (TJ) on the die
limits the maximum safe power dissipation in the AD8067
package. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the AD8067. Exceeding a junction temperature
of 175°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the
voltage between the supply pins (VS) times the quiescent
current (IS). Assuming the load (RL) is referenced to midsupply,
the total drive power is VS/2 × IOUT, some of which is dissipated
in the package and some in the load (VOUT × IOUT). The
difference between the total drive power and the load power is
the drive power dissipated in the package. RMS output voltages
should be considered.
PD = Quiescent Power + (Total Drive Power Load Power)
(
)
L
OUT
L
OUT
S
D
R
V
R
V
I
V
P
2
2
×
+
×
=
If RL is referenced to VS as in single-supply operation, then the
total drive power is VS × IOUT.
If the rms signal levels are indeterminate, then consider the
worst case, when VOUT = VS/4 for RL to midsupply:
(
) (
)
L
S
D
R
V
I
V
P
2
4
/
+
×
=
In single-supply operation with RL referenced to VS, worst case
is VOUT = VS/2.
Airflow increases heat dissipation effectively, reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θJA.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the SOT-23-5
(180°C/W) package on a JEDEC standard 4-layer board. θJA
values are approximations.
It should be noted that for every 10°C rise in temperature, IB
approximately doubles (see Figure 22).
–40
2.0
1.5
0.5
0
AMBIENT TEMPERATURE – °C
MAXIMUM
POWER
DISSIPATION
W
1.0
–30 –20 –10
80
10
20
30
40
50
60
70
SOT-23-5
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
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