參數(shù)資料
型號(hào)： AD8075ARUZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 3/15頁(yè)
文件大小： 0K
描述： IC TRPL VID BUFF 500MHZ 16-TSSOP
標(biāo)準(zhǔn)包裝： 1,000
應(yīng)用： 緩沖器
電路數(shù)： 3
-3db帶寬： 550MHz
轉(zhuǎn)換速率： 1350 V/µs
電流 - 電源： 24mA
電流 - 輸出 / 通道： 70mA
電壓 - 電源，單路/雙路(±)： 9 V ~ 11 V，±4.5 V ~ 5.5 V
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
AD8074/AD8075
–11–
Triple Video Multiplexer
The AD8074 and AD8075 each have an output-enable function
that can be used to disable the outputs and put them in a high-
impedance state. Usually, for a unity-gain device, it is relatively
easy to provide high disabled impedance, because the feedback
path is from the output to a high-impedance input. However, for a
non-unity-gain part, the feedback provides a resistive path to
ground. This will usually dominate the disabled output imped-
ance, and make it a much lower value than the unity-gain device.
The AD8075 has an internal buffer that provides a low-impedance,
ground level output that terminates the feedback path during
enabled operation. In the disabled state, both this buffer output
and the amplifier output are disabled to a high impedance to
provide a high-impedance disabled state.
To construct a multiplexer, the outputs from one or more devices
are connected in parallel and only one device is enabled at a
time while all of the others are disabled. The two sets of inputs
are applied individually to each of the separate device inputs.
Figure 4 shows the circuit details for this function. The first RGB
Source 1 is input to the first AD8075. Each of the individual
signals is terminated to ground with 75
to provide proper
termination for the input cables. In a similar fashion, the Source
2 signals are input to the second AD8075.
0.1 F
–5V
0.1 F
–5V
0.1 F
–5V
+
25 F
0.1 F
+5V
0.1 F
+5V
0.1 F
+5V
+
25 F
AD8075
75
OE
75
R
G
B
SOURCE 2
0.1 F
–5V
0.1 F
–5V
0.1 F
–5V
+
25 F
0.1 F
+5V
0.1 F
+5V
0.1 F
+5V
+
25 F
AD8075
75
OE
75
R
G
B
SOURCE 1
SEL1/
SEL2
R
G
B
OUTPUT
Figure 4. Mux
Rev. B
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