I2C Control The I
參數(shù)資料
型號: AD8120ACPZ-R2
廠商: Analog Devices Inc
文件頁數(shù): 4/16頁
文件大?。?/td> 0K
描述: IC ANLG VIDEO DELAY LINE 32LFCSP
標(biāo)準(zhǔn)包裝: 1
類型: 視頻延遲線
應(yīng)用: HD 視頻
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LFCSP-EP(5x5)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AD8120ACPZ-R2DKR
AD8120
Data Sheet
Rev. A | Page 12 of 16
I2C Control
The I2C interface of the AD8120 is a 2-wire interface consisting
of a clock input and a bidirectional data line. The AD8120
drives the SDA line either to acknowledge the master (ACK) or
to send data during a read operation. The SDA pin for the I2C
port is open drain and requires a 10 kΩ pull-up resistor.
Table 9. AD8120 I2C Pin Descriptions
Pin No.
Pin Name
Description
2
SDA
Serial data input/output
30
SCL
Serial clock input
29
A1
I2C Address Bit A1
31
A0
I2C Address Bit A0
The AD8120 address consists of a built-in address of 0x38 and the
two address pins, A0 and A1. The two address pins enable up to
four AD8120 devices to be used in a system (see Table 10). Both
address pins must be terminated (high or low) for the AD8120
I2C interface to operate properly.
Table 10. I2C Addresses
A1 Pin
A0 Pin
I2C Address
0
0x38
0
1
0x39
1
0
0x3A
1
0x3B
In I2C mode, the AD8120 is programmed with a 3-byte sequence
for a write operation (see Figure 19) and a 4-byte sequence for a
read operation (see Figure 20). The first byte contains the 7-bit
device address and the R/W instruction bit. The second byte con-
tains the color register.
In write mode, the third byte contains the delay code. In read
mode, the third byte contains the device address, and the fourth
byte contains the stored delay code.
START BY
MASTER
STOP BY
MASTER
ACK BY
AD8120
ACK BY
AD8120
ACK BY
AD8120
0
1
9
1
0
A1
A0
0
C1
C0
SCL
SDA
SDA (CONTINUED)
SCL (CONTINUED)
9
1
X
D5
D4
D3
D2
D1
D0
R/W
07839-
023
BYTE 1
I2C ADDRESS
BYTE 2
COLOR REGISTER
BYTE 3
DELAY DATA CODE
Figure 19. I2C Write Sequence
START BY
MASTER
ACK BY
AD8120
ACK BY
AD8120
R/W
SCL
1
9
SDA
0
1
0
1
0
A1
A0
0
C1
C0
BYTE 1
I2C ADDRESS
BYTE 2
COLOR REGISTER
BYTE 3
I2C ADDRESS
BYTE 4
DATA BYTE FROM AD8120
STOP BY
MASTER
START BY
MASTER
ACK BY
AD8120
NO ACK BY
AD8120
SCL
1
9
SDA
A1
A0
1
X
D5
D4
D3
D2
D1
D0
R/W
07839-
024
Figure 20. I2C Read Sequence
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