In many dual-supply applications, VREF can be directly
參數(shù)資料
型號(hào)： AD8143ACPZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/24頁(yè)
文件大?。?/td> 0K
描述： IC RECEIVER TRIPLE DIFF 32LFCSP
標(biāo)準(zhǔn)包裝： 5,000
類型： 接收器
驅(qū)動(dòng)器/接收器數(shù)： 0/3
規(guī)程： 以太網(wǎng)
電源電壓： 4.5 V ~ 24 V
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ
包裝： 帶卷 (TR)
AD8143
Rev. 0 | Page 19 of 24
In many dual-supply applications, VREF can be directly
connected to ground right at the device.
TERMINATING THE INPUT
One of the key benefits of the active-feedback architecture is the
separation that exists between the differential input signal and
the feedback network. Because of this separation, the differential
input maintains its high CMRR and provides high differential
and common-mode input impedances, making line termination
a simple task.
Most applications that use the AD8143 involve transmitting
broadband video signals over 100 Ω UTP cable and use
dc-coupled terminations. The two most common types of
dc-coupled terminations are differential and common-mode.
Differential termination of 100 Ω UTP is implemented by
simply connecting a 100 Ω resistor across the amplifier input,
as shown in Figure 40.
+
–
+5V
–5V
REF
FB
RG
RF
0.01
μF
0.01
μF
+
–
VIN
VOUT
05538-041
100
Ω
UTP
100
Ω
Figure 40. Differential-Mode Termination
Some applications require common-mode terminations for
common-mode currents generated at the transmitter. In these
cases, the 100 Ω termination resistor is split into two 50 Ω
resistors. The required common-mode termination voltage is
applied at the tap between the two resistors. In many of these
applications, the common-mode tap is connected to ground
(VTERM (CM) = 0). This scheme is illustrated in Figure 41.
+
–
+5V
–5V
REF
FB
RG
RF
0.01
μF
0.01
μF
+
–
VIN
VOUT
VTERM(CM)
05538-042
100
Ω
UTP
50
Ω
50
Ω
Figure 41. Common-Mode Termination
INPUT CLAMPING
The differential input that is assigned to receive the input signal
includes clamping diodes that limit the differential input swing
to approximately 5.5 V p-p at 25°C. Because of this, the input
and feedback stages should never be interchanged. Figure 31
illustrates the clamping action at the signal input stage.
The supply current drawn by the AD8143 has a strong
dependence on input signal magnitude because the input
transconductance stages operate with differential input signals
that can be up to a few volts peak-to-peak. This behavior is
distinctly different from that of traditional op-amps, where the
differential input signal is driven to essentially 0 V by negative
feedback. Figure 28 illustrates the supply current dependence on
input voltage.
For most applications, including receiving RGB video signals,
the input signal magnitudes encountered are well within the
safe operating limits of the AD8143 over its full power supply
and operating temperature ranges. In some extreme applications
where large differential and/or common-mode voltages can be
encountered, external clamping may be necessary. Another
application where external common-mode clamping is
sometimes required is when an unpowered AD8143 receives a
signal from an active driver. In this case, external diodes are
required when the current drawn by the internal ESD diodes
cannot be kept to less than 5 mA.
When using ±12 V supplies, the differential input signal must
be kept to less than 4 V p-p. In applications that use ±12 V
supplies where the input signals are expected to reach or exceed
4 V p-p, external differential clamping at a maximum of 4 V p-p
is required.
Figure 42 shows a general approach to external differential-
mode clamping.
POSITIVE CLAMP
NEGATIVE CLAMP
RS
RT
VIN
VOUT
RS
–
+
–
+
05538-051
Figure 42. Differential-Mode Clamping
The positive and negative clamps are nonlinear devices that
exhibit very low impedance when the voltage across them
reaches a critical threshold (clamping voltage), thereby limiting
the voltage across the AD8143 input. The positive clamp has a
positive threshold, and the negative clamp has a negative
threshold.
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