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參數(shù)資料
| 型號： | AD8148ACPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DRIVER TRIPLE DIFF 24-LFCSP |
| 標準包裝： | 5,000 |
| 應(yīng)用： | 差分 |
| 輸出類型： | 差分 |
| 電路數(shù)： | 3 |
| -3db帶寬： | 900MHz |
| 轉(zhuǎn)換速率： | 3000 V/µs |
| 電流 - 電源： | 62.5mA |
| 電流 - 輸出 / 通道： | 87mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 11 V，±2.25 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 帶卷 (TR) |
AD8146/AD8147/AD8148
Data Sheet
Rev. B | Page 18 of 24
be less than or equal to the positive supply voltage. In low
positive supply applications, such as those that use ±2.5 V supplies,
external limiting may be required because many logic families
produce amplitudes up to 5 V. Figure 32 illustrates how to use a
monolithic triple diode to limit a sync pulse with 5 V amplitude
to an amplitude of approximately 2 V.
301
1
6
2
5
3
4
HN2D02FUTW1T1
0V
+5V
INCOMING
SYNC PULSE
0V
+2V
LIMITED
SYNC PULSE
06655-
036
Figure 32. Limiting Sync Pulse Amplitude in Low Positive Supply Applications
DRIVING TWO UTP CABLES WITH ONE DRIVER
Some applications require driving two UTP cables with a single
is capable of driving two doubly terminated cables, which places
a differential load of 100 across the outputs of the driver.
Figure 33 illustrates how to drive two cables.
AD8146/AD8147/AD8148
49.9
100
UTP
49.9
100
UTP
VOCM
09327-
034
Figure 33. Driving Two UTP Cables With One Driver
Driver bandwidth is affected to a small degree when driving the
100 load presented by the two cables, as compared with
driving a typical 200 load. Figure 34 illustrates the AD8146/
15
–3
FREQUENCY (MHz)
G
AI
N
(
d
B)
12
9
6
3
0
1000
100
10
1
AD8148
AD8147
AD8146
RL, dm = 100
VOUT = 2V p-p
09327-
044
Figure 34. Large Signal Frequency Response Driving 100 Loads
USING THE AD8146 AS A RECEIVER
While the AD8146 excels as a differential driver, it can also be
used as a differential-to-differential receiver applied as an
input buffer that protects a more sophisticated device, such as a
differential crosspoint switch. See Figure 35 for an illustration of
this type of application.
Because the AD8146 VOCM input pins are uncommitted, any
incoming common-mode signal, such as encoded sync pulses,
can be reproduced at the AD8146 outputs by stripping it from
the received signal and applying it directly to the VOCM pin.
The two series 54.9 resistors form a differential termination
resistor of 109.8 , which when loaded with the 1 k differential
input resistance of the AD8146, provides an overall termination
of approximately 100 . The received common-mode voltages
are available at the center taps between the two resistors.
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