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| 型號(hào)： | AD817ANZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP HS LP 8-DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 應(yīng)用： | 通用 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 50MHz |
| 轉(zhuǎn)換速率： | 350 V/µs |
| 電流 - 電源： | 7mA |
| 電流 - 輸出 / 通道： | 50mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 36 V，±2.5 V ~ 18 V |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 766 (CN2011-ZH PDF) |
AD817
REV. B
–11–
A HIGH PERFORMANCE ADC INPUT BUFFER
High performance analog to digital converters (ADCs) require
input buffers with correspondingly high bandwidths and very
low levels of distortion. Typical requirements include distortion
levels of –60 dB to –70 dB for a 1 volt p-p signal and band-
widths of 10 MHz or more. In addition, an ADC buffer may
need to drive very large capacitive loads.
The circuit of Figure 36 is useful for driving high speed convert-
ers such as the differential input of the AD733, 10-bit ADC.
This circuit may be used with other converters with only minor
modifications. Using the AD817 provides the user with the op-
tion of either operating the buffer in differential mode or from a
single +5 volt supply. Operating from a +5 volt power supply
helps to avoid overdriving the ADC—a common problem with
buffers operating at higher supply voltages.
SINGLE SUPPLY OPERATION
Another exciting feature of the AD817 is its ability to perform
well in a single supply configuration. The AD817 is ideally
suited for applications that require low power dissipation and
high output current and those which need to drive large capaci-
tive loads, such as high speed buffering and instrumentation.
Referring to Figure 37, careful consideration should be given to
the proper selection of component values. The choices for this
particular circuit are: R1+ R3//R2 combine with C1 to form a
low frequency corner of approximately 300 Hz.
R2
10k
C3
0.1
F
R1
9k
R3
1k
C2
0.1
F
C1
0.1
F
C
L
200pF
R
L
150
SELECT C1, R1, R2 & R3
FOR DESIRED LOW
FREQUENCY CORNER.
(R2 = R1 + R3)
C
OUT
+V
S
V
OUT
V
IN
AD817
7
6
3
2
4
0.01
F
3.3
F
Figure 37. Single Supply Amplifier Configuration
Combining R3 with C2 forms a low-pass filter with a corner
frequency of 1.5 kHz. This is needed to maintain amplifier
PSRR, since the supply is connected to VIN through the input
divider. The values for RL and CL were chosen to demonstrate
the AD817’s exceptional output drive capability. In this con-
figuration, the output is centered around 2.5 V. In order to
eliminate the static dc current associated with this level, C3 was
inserted in series with RL.
52.5
0.1
F
1k
0.1
F
–V
S
1k
1k
1k
AD773
10-BIT
18MHz
ADC
V
INA
V
INB
ADREF43
VOLTAGE
REFERENCE
+2.5V
50
COAX
CABLE
V
IN
500mVp-p
MAX
+V
S
AD817
7
6
3
2
4
26
27
0.1
F
0.1
F
–V
S
+V
S
AD817
7
6
3
2
4
+5V
COMMON
–5V
100
F
25V
100
F
25V
+V
S
–V
S
Figure 36. A Differential Input Buffer for High Bandwidth ADCs
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