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| 型號： | AD818ANZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO OPAMP 130MHZ LP 8-DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 應(yīng)用： | 電壓反饋 |
| 電路數(shù)： | 1 |
| -3db帶寬： | 130MHz |
| 轉(zhuǎn)換速率： | 500 V/µs |
| 電流 - 電源： | 7mA |
| 電流 - 輸出 / 通道： | 50mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 36 V，±2.5 V ~ 18 V |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 772 (CN2011-ZH PDF) |
REV.
AD818
–11–
–IN
+IN
NULL 1
NULL 8
OUTPUT
+VS
–VS
Figure 4. AD818 Simplified Schematic
THEORY OF OPERATION
The AD818 is a low cost video operational amplifier designed to
excel in high performance, high output current video applications.
The AD818 (Figure 4) consists of a degenerated NPN differen-
tial pair driving matched PNPs in a folded-cascode gain stage.
The output buffer stage employs emitter followers in a class
AB amplifier that delivers the necessary current to the load, while
maintaining low levels of distortion.
The AD818 will drive terminated cables and capacitive loads of
10 pF or less. As the closed-loop gain is increased, the AD818
will drive heavier capacitive loads without oscillating.
INPUT CONSIDERATIONS
An input protection resistor (RIN in TPC 28) is required in
circuits where the input to the AD818 will be subjected to tran-
sients of continuous overload voltages exceeding the
± 6 V
maximum differential limit. This resistor provides protection for
the input transistors by limiting their maximum base current.
For high performance circuits, it is recommended that a “bal-
ancing” resistor be used to reduce the offset errors caused by
bias current flowing through the input and feedback resistors.
The balancing resistor equals the parallel combination of RIN
and RF and thus provides a matched impedance at each input
terminal. The offset voltage error will then be reduced by more
than an order of magnitude.
GROUNDING AND BYPASSING
When designing high frequency circuits, some special precautions
are in order. Circuits must be built with short interconnect leads.
When wiring components, care should be taken to provide a low
resistance, low inductance path to ground. Sockets should be
avoided, since their increased interlead capacitance can degrade
circuit bandwidth.
Feedback resistors should be of low enough value (
1 kW) to
ensure that the time constant formed with the inherent stray
capacitance at the amplifier’s summing junction will not limit
performance. This parasitic capacitance, along with the parallel
resistance of RF RIN, forms a pole in the loop transmission, which
may result in peaking. A small capacitance (1 pF–5 pF) may be
used in parallel with the feedback resistor to neutralize this effect.
Power supply leads should be bypassed to ground as close as
possible to the amplifier pins. Ceramic disc capacitors of 0.1
mF
are recommended.
10k
–VS
VOS ADJUST
+VS
AD818
Figure 5. Offset Null Configuration
OFFSET NULLING
The input offset voltage of the AD818 is inherently very low.
However, if additional nulling is required, the circuit shown
in Figure 5 can be used. The null range of the AD818 in this
configuration is
±10 mV.
SINGLE SUPPLY OPERATION
Another exciting feature of the AD818 is its ability to perform
well in a single supply configuration. The AD818 is ideally
suited for applications that require low power dissipation and
high output current.
Referring to Figure 6, careful consideration should be given to
the proper selection of component values. The choices for this
particular circuit are: R1 + R3 R2 combine with C1 to form a
low frequency corner of approximately 10 kHz. C4 was inserted
in series with R4 to maintain amplifier stability at high frequency.
Combining R3 with C2 forms a low-pass filter with a corner
frequency of approximately 500 Hz. This is needed to maintain
amplifier PSRR, since the supply is connected to VIN through
the input divider. The values for R2 and C2 were chosen to
demonstrate the AD818’s exceptional output drive capability.
In this configuration, the output is centered around 2.5 V. In
order to eliminate the static dc current associated with this level,
C3 was inserted in series with R L.
R2
3.3k
R1
3.3k
R3
100
C2
3.3 F
VIN
C1
0.01 F
C4
0.001 F
R4
1k
AD818
VOUT
VS
3.3 F
0.01 F
SELECT C1, R1, R2
FOR DESIRED LOW
FREQUENCY CORNER.
C3
0.1 F
RL
150
1k
Figure 6. Single-Supply Amplifier Configuration
D
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