參數資料
| 型號： | AD820AR |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 9/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP JFET R-R 1.8MHZ 8SOIC |
| 標準包裝： | 98 |
| 放大器類型： | J-FET |
| 電路數： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉換速率： | 3 V/µs |
| 增益帶寬積： | 1.8MHz |
| -3db帶寬： | 1.9MHz |
| 電流 - 輸入偏壓： | 2pA |
| 電壓 - 輸入偏移： | 400µV |
| 電流 - 電源： | 700µA |
| 電流 - 輸出 / 通道： | 20mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 36 V，±2.5 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SO |
| 包裝： | 管件 |
AD820
Rev. H | Page 17 of 24
OUTPUT CHARACTERISTICS
The AD820 unique bipolar rail-to-rail output stage swings
within 5 mV of the negative supply and 10 mV of the positive
supply with no external resistive load. The approximate output
saturation resistance of the AD820 is 40 Ω sourcing and 20 Ω
sinking. This can be used to estimate output saturation voltage
when driving heavier current loads. For instance, when sourcing
5 mA, the saturation voltage to the positive supply rail is 200 mV;
when sinking 5 mA, the saturation voltage to the negative rail
is 100 mV.
The open-loop gain characteristic of the amplifier changes
as a function of resistive load, as shown in Figure 10 through
Figure 13. For load resistances over 20 kΩ, the AD820 input
error voltage is virtually unchanged until the output voltage is
driven to 180 mV of either supply.
If the AD820 output is driven hard against the output saturation
voltage, it recovers within 2 μs of the input returning to the
linear operating region of the amplifier.
Direct capacitive load interacts with the effective output imped-
ance of the amplifier to form an additional pole in the amplifier
feedback loop, which can cause excessive peaking on the pulse
response or loss of stability. The worst case occurs when the
amplifier is used as a unity-gain follower. Figure 40 shows
AD820 pulse response as a unity-gain follower driving 350 pF.
This amount of overshoot indicates approximately 20 degrees
of phase margin—the system is stable, but is nearing the edge.
Configurations with less loop gain, and as a result less loop
bandwidth, are much less sensitive to capacitance load effects.
Figure 41 is a plot of noise gain vs. the capacitive load that results
in a 20 degree phase margin for the AD820. Noise gain is the
inverse of the feedback attenuation factor provided by the
feedback network in use.
00
87
3-
04
1
20mV
2s
100
90
10
0%
Figure 40. Small Signal Response of AD820 as Unity-Gain Follower Driving
350 pF Capacitive Load
00
87
3-
0
42
5
1
300
30k
CAPACITIVE LOAD FOR 20 PHASE MARGIN (pF)
N
OIS
E
GA
IN
(
1+
)
P
I
P
F
4
3
2
1k
3k
10k
–
+
RF
R1
Figure 41. Noise Gain vs. Capacitive Load Tolerance
Figure 42 shows a possible configuration for extending
capacitance load drive capability for a unity-gain follower. With
these component values, the circuit drives 5000 pF with a 10%
overshoot.
0
08
73
-04
3
AD820
–
+
–
+
+VS
–VS
0.01F
20pF
20k
100
VOUT
VIN
3
2
4
7
6
–
+
Figure 42. Extending Unity-Gain Follower Capacitive Load Capability
Beyond 350 pF
SINGLE-SUPPLY HALF-WAVE AND FULL-WAVE
RECTIFIERS
An AD820 configured as a unity-gain follower and operated
with a single supply can be used as a simple half-wave rectifier.
The AD820 inputs maintain picoamp level input currents even
when driven well below the negative supply. The rectifier puts
that behavior to good use, maintaining an input impedance of
over 1011 Ω for input voltages from 1 V from the positive supply
to 20 V below the negative supply.
The full- and half-wave rectifier shown in Figure 43 operates as
follows: when VIN is above ground, R1 is bootstrapped through
the unity-gain follower, A1, and the loop of Amplifier A2. This
forces the inputs of A2 to be equal; thus, no current flows through
R1 or R2, and the circuit output tracks the input. When VIN is
below ground, the output of A1 is forced to ground. The
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