參數(shù)資料
型號(hào): AD8225ARZ-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 4/16頁(yè)
文件大小: 0K
描述: IC AMP INST PREC LP LDRIFT 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 5 V/µs
-3db帶寬: 900kHz
電流 - 輸入偏壓: 500pA
電壓 - 輸入偏移: 50µV
電流 - 電源: 1.05mA
電流 - 輸出 / 通道: 18mA
電壓 - 電源,單路/雙路(±): 3.4 V ~ 36 V,±1.7 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
配用: AD8225-EVALZ-ND - BOARD EVAL FOR AD8225 INSTR AMP
REV. A
–12–
AD8225
Driving a High Resolution ADC
Most high precision ADCs feature differential analog inputs.
Differential inputs offer an inherent 6 dB improvement in S/N
ratio and resultant bit resolution. These advantages are easy to
realize using a pair of AD8225s.
AD8225s can be configured to drive an ADC with differential
inputs by using either single-ended or differential inputs to the
AD8225s. Figure 7 shows the circuit connections for a differen-
tial input. A single-ended input may be configured by connecting
the negative input terminal to ground.
2
3
2
3
6
5
AD8225
OP177
1.25V
4.99k
2.7nF
75
AD7675
100kSPS
5V
16
BITS
AD780
2.5V
RERERENCE
+IN
–IN
ALTERNATE
CONNECTION
FOR SE SOURCE
Figure 7. Driver for Differential ADC
The AD7675 ADC illustrated in Figure 7 is a SAR type converter.
When the input is sampled, the internal sample-and-hold capacitor
is charged to the input voltage level. Since the output of the
AD8225 cannot track the instantaneous current surge, a voltage
glitch develops. To source the momentary current surge, a
capacitor is connected from the A/D input terminal to ground.
Since the AD8225 cannot tolerate greater than approximately
100 pF of capacitance at its output, a 75
series resistor is
required at each in amp output to prevent oscillation.
Using the Reference Input
Note in the example in Figure 7 that Pin 5, the reference input, is
driven by a voltage source. This is because the reference pin is
internally connected to a 15 k
resistor, which is carefully trimmed
to optimize common-mode rejection. Any additional resistance
connected to this node will unbalance the bridge network formed
by the two 3 k
and two 15 k resistors, resulting in an error
voltage generated by common-mode voltages at the input pins.
AD8225 Used as an EKG Front End
The topology of the instrumentation amplifier has made it the
circuit configuration of choice for designers of EKG and other
low level biomedical amplifiers. CMRR and common-mode
voltage advantages of the instrumentation amplifier are tailor
made to meet the challenges of detecting minuscule cardiac
generated voltage levels in the presence of overwhelming levels
of noise and dc offset voltage. The subtracter circuit of the in
amp will extract and amplify low level signals that are virtually
obscured by the presence of high common-mode dc and ac
potentials.
A typical circuit block diagram of an EKG amplifier is shown in
Figure 8. Using discrete op amps in the in amp and gain stages,
the signal chain usually includes several filters, high voltage
protection, lead-select circuitry, patient lead buffering, and an
ADC. Designers who roll their own instrumentation amplifiers
must provide precision custom trimmed resistor networks and
well matched op amps.
The AD8225 instrumentation amplifier not only replaces all the
components shown in the highlighted block in Figure 8, but also
provides a solution to many of the difficult design problems
encountered in EKG front ends. Among these are patient gener-
ated errors from ac noise sources and errors generated by unequal
electrode potentials. Alone, these error voltages can exceed the
desired QRS complex by orders of magnitude.
INSTRUMENTATION AMPLIFIER
G = 3 TO 10
LEAD
SELECT,
HV
PROTECTION,
FILTERING
GAIN AND ADC
TOTAL G = 1000
PATIENT
ISOLATION
BARRIER
DIGITAL DATA
TO SYSTEM
MAINFRAME
A1
A2
A3
Figure 8. Block Diagram, EKG Monitor Front End Using Discrete Components
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