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| 型號： | AD8226BRMZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/28頁 |
| 文件大小： | 0K |
| 描述： | IC INSTR AMP RRO +/-18 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 1 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 0.6 V/µs |
| -3db帶寬： | 1.5MHz |
| 電流 - 輸入偏壓： | 20nA |
| 電壓 - 輸入偏移： | 100µV |
| 電流 - 電源： | 350µA |
| 電流 - 輸出 / 通道： | 13mA |
| 電壓 - 電源，單路/雙路(±)： | 2.2 V ~ 36 V，±1.35 V ~ 18 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
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Data Sheet
AD8226
Rev. C | Page 19 of 28
THEORY OF OPERATION
A3
R2
24.7k
R1
24.7k
A1
A2
Q2
Q1
–IN
+IN
+VS
–VS
R3
50k
R4
50k
R5
50k
RB
+VS
–VS
VOUT
REF
07
03
6-
0
03
NODE 1
NODE 2
RG
VBIAS
+VS
–VS
+VS
–VS
NODE 4
NODE 3
R6
50k
DIFFERENCE
AMPLIFIER STAGE
GAIN STAGE
ESD AND
OVERVOLTAGE
PROTECTION
ESD AND
OVERVOLTAGE
PROTECTION
–VS
Figure 58. Simplified Schematic
ARCHITECTURE
The AD8226 is based on the classic 3-op-amp topology. This
topology has two stages: a preamplifier to provide differential
amplification, followed by a difference amplifier to remove the
common-mode voltage. Figure 58 shows a simplified schematic
of the AD8226.
The first stage works as follows: in order to maintain a constant
voltage across the bias resistor RB, A1 must keep Node 3 a con-
stant diode drop above the positive input voltage. Similarly, A2
keeps Node 4 at a constant diode drop above the negative input
voltage. Therefore, a replica of the differential input voltage is
placed across the gain-setting resistor, RG. The current that
flows across this resistance must also flow through the R1
and R2 resistors, creating a gained differential signal between
the A2 and A1 outputs. Note that, in addition to a gained
differential signal, the original common-mode signal, shifted
a diode drop up, is also still present.
The second stage is a difference amplifier, composed of A3 and
four 50 kΩ resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The transfer function of the AD8226 is
VOUT = G(VIN+ VIN) + VREF
where:
G
R
G
kΩ
49.4
1
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the
AD8226, which can be calculated by referring to Table 7 or by
using the following gain equation:
1
kΩ
49.4
G
R
G
Table 7. Gains Achieved Using 1% Resistors
1% Standard Table Value of RG (Ω)
Calculated Gain
49.9 k
1.990
12.4 k
4.984
5.49 k
9.998
2.61 k
19.93
1.00 k
50.40
499
100.0
249
199.4
100
495.0
49.9
991.0
The AD8226 defaults to G = 1 when no gain resistor is used.
The tolerance and gain drift of the RG resistor should be added
to the AD8226 specifications to determine the total gain accu-
racy of the system. When the gain resistor is not used, gain
error and gain drift are minimal.
If a gain of 5 is required and minimal gain drift is important,
consider using the AD8227. The AD8227 has a default gain of 5
that is set with internal resistors. Because all resistors are internal,
the gain drift is extremely low (<5 ppm/°C maximum).
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