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| 型號： | AD8228ARZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/24頁 |
| 文件大小： | 0K |
| 描述： | IC AMP INST PREC LDRIFT LN 8SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Current Sense Amplifiers Instrumentation Amplifiers Performance |
| 標(biāo)準(zhǔn)包裝： | 98 |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 2.5 V/µs |
| -3db帶寬： | 650kHz |
| 電流 - 輸入偏壓： | 500pA |
| 電壓 - 輸入偏移： | 90µV |
| 電流 - 電源： | 850µA |
| 電流 - 輸出 / 通道： | 18mA |
| 電壓 - 電源，單路/雙路(±)： | 4.6 V ~ 36 V，±2.3 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 771 (CN2011-ZH PDF) |
AD8228
Rev. 0 | Page 16 of 24
THEORY OF OPERATION
C1
C2
I
IB COMPENSATION
VBIAS
A1
A2
A3
R4
489
G1 G2
GAIN
SET
R3
4.889k
R2
22k
R1
22k
V1
V2
+VS
–VS
+VS
–VS
Q1
Q2
600
–VS
–IN
+VS
600
–VS
+IN
+VS
–VS
10k
+VS
–VS
OUTPUT
REF
07
03
5-
01
8
Figure 41. Simplified Schematic
ARCHITECTURE
The AD8228 is based on the classic three op amp topology. This
topology has two stages: a preamplifier to provide differential
amplification, followed by a difference amplifier to remove the
common-mode voltage. Figure 41 shows a simplified schematic
of the AD8228.
The first stage is composed of the A1 and A2 amplifiers, the Q1
and Q2 input transistors, and the R1 through R4 resistors. The
feedback loop of A1, R1, and Q1 ensures that the V1 voltage is
a constant diode drop below in the negative input voltage.
Similarly, V2 is kept a constant diode drop below the positive
input. Therefore, a replica of the differential input voltage is
placed across either R3 (when the gain pins are left open) or
R3||R4 (when the gain pins are shorted). The current that flows
across this resistance must also flow through the R1 and R2
resistors, creating a gained differential signal between the A2
and A1 outputs. Note that, in addition to a gained differential
signal, the original common-mode signal, shifted a diode drop
down, is also still present.
The second stage is a difference amplifier, composed of A3 and
four 10 kΩ resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The AD8228 does not depend on external resistors. Much of the
dc performance of precision circuits depends on the accuracy and
matching of resistors. The resistors on the AD8228 are laid out to
be tightly matched. The resistors of each part are laser trimmed
and tested for their matching accuracy. Because of this trimming
and testing, the AD8228 can guarantee high accuracy for speci-
fications such as gain drift, common-mode rejection (CMRR),
and gain error.
SETTING THE GAIN
The AD8228 can be configured for a gain of 10 or 100 with no
external components. Leave Pin 2 and Pin 3 open for a gain of 10;
short Pin 2 and Pin 3 together for a gain of 100 (see Figure 42).
07
03
5
-00
3
AD8228
1
2
3
4
8
5
6
7
+VS
–VS
REF
–IN
+IN
AD8228
1
2
3
4
8
5
6
7
+VS
–VS
REF
VOUT
–IN
+IN
G = 10
PIN 2 AND PIN 3 OPEN
G = 100
PIN 2 AND PIN 3 SHORTED
Figure 42. Setting the Gain
The transfer function with Pin 2 and Pin 3 open is
VOUT = 10 × (VIN+ VIN) + VREF
The transfer function with Pin 2 and Pin 3 shorted is
VOUT = 100 × (VIN+ VIN) + VREF
COMMON-MODE INPUT VOLTAGE RANGE
The three op amp architecture of the AD8228 applies gain and
then removes the common-mode voltage. Therefore, internal
nodes in the AD8228 experience a combination of both the
gained signal and the common-mode signal. This combined
signal can be limited by the voltage supplies even when the
individual input and output signals are not. Figure 10 through
Figure 13 show the allowable common-mode input voltage
ranges for various output voltages and supply voltages.
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