參數(shù)資料
型號: AD822ARZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 11/24頁
文件大?。?/td> 0K
描述: IC OPAMP GP R-R 1.9MHZ LP 8SOIC
設(shè)計資源: 16-Bit Fully Isolated 4 mA to 20 mA Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0064)
標準包裝: 750
放大器類型: 通用
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 3 V/µs
增益帶寬積: 1.9MHz
-3db帶寬: 1.9MHz
電流 - 輸入偏壓: 2pA
電壓 - 輸入偏移: 400µV
電流 - 電源: 1.4mA
電流 - 輸出 / 通道: 20mA
電壓 - 電源,單路/雙路(±): 3 V ~ 36 V,±1.5 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
產(chǎn)品目錄頁面: 773 (CN2011-ZH PDF)
其它名稱: AD822ARZ-REEL7TR
AD822
Rev. I | Page 19 of 24
90
... .
....
.... .... .... .... .... .... .... . ...
....
.... . ... . ... .... .... .... .... . ...
100
0%
10
20mV
2s
00
87
4-
0
44
Figure 44. Small Signal Response of AD822 as
Unity-Gain Follower Driving 350 pF
Figure 45 is a plot of noise gain vs. capacitive load that results in
a 20° phase margin for the AD822. Noise gain is the inverse of
the feedback attenuation factor provided by the feedback
network in use.
1
2
3
4
5
300
1k
3k
10k
30k
CAPACITIVE LOAD FOR 20° PHASE MARGIN (pF)
NO
IS
E
G
AI
N
1+
R
F
R
1
R1
RF
CL
00
87
4-
0
45
Figure 45. Noise Gain vs. Capacitive Load Tolerance
Figure 46 shows a method for extending capacitance load drive
capability for a unity-gain follower. With these component
values, the circuit drives 5000 pF with a 10% overshoot.
20pF
100
20k
8
4
VIN
V+
0.01F
VOUT
0.01F
CL
1/2
AD822
+
V–
00
87
4-
0
46
Figure 46. Extending Unity-Gain Follower Capacitive Load Capability
Beyond 350 pF
SINGLE-SUPPLY VOLTAGE-TO-FREQUENCY
CONVERTER
The circuit shown in Figure 47 uses the AD822 to drive a low
power timer that produces a stable pulse of width t1. The positive
going output pulse is integrated by R1 and C1 and used as one
input to the AD822 that is connected as a differential integrator.
The other input (nonloading) is the unknown voltage, VIN. The
AD822 output drives the timer trigger input, closing the overall
feedback loop.
2
3
4
6
5
U3A
U3B
C3
0.1F
1
2
3
4
OUT2
OUT1
U1
C1
U2
CMOS 555
THR
TR
DIS
GND
OUT
CV
1
2
3
4
5
6
7
8
RV+
C4
0.01F
R3
116k
0.01F, 2%
CMOS
74HCO4
RSCALE
10k
U4
REF02
VREF = 5V
10V
C5
0.1F
R2
499k
1%
R1
499k
1%
VIN
C2
0.01F
2%
0V TO 2.5V
FULL SCALE
1/2
AD822B
+
NOTES
1. fOUT = VIN/(VREF × t1), t1 = 1.1 × R3 × C6.
2. R3 = 1% METAL FILM <50ppm/°C TC.
3. RSCALE = 10% 20T FILM <100ppm/°C TC.
4. t1 = 33F FOR fOUT = 20kHz @ VIN = 2.0V.
= 25kHz
fS AS SHOWN.
0
08
74-
047
Figure 47. Single-Supply Voltage-to-Frequency Converter
Typical AD822 bias currents of 2 pA allow MΩ range source
impedances with negligible dc errors. Linearity errors on the
order of 0.01% full scale can be achieved with this circuit. This
performance is obtained with a 5 V single supply that delivers
less than 1 mA to the entire circuit.
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