參數(shù)資料
型號: AD825AR
廠商: Analog Devices Inc
文件頁數(shù): 2/12頁
文件大小: 0K
描述: IC OPAMP JFET GP 26MHZ 8SOIC
標(biāo)準(zhǔn)包裝: 98
放大器類型: J-FET
電路數(shù): 1
轉(zhuǎn)換速率: 140 V/µs
增益帶寬積: 26MHz
-3db帶寬: 46MHz
電流 - 輸入偏壓: 15pA
電壓 - 輸入偏移: 1000µV
電流 - 電源: 6.5mA
電流 - 輸出 / 通道: 50mA
電壓 - 電源,單路/雙路(±): 10 V ~ 36 V,±5 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 管件
產(chǎn)品目錄頁面: 766 (CN2011-ZH PDF)
AD825
Rev. F | Page 10 of 12
DRIVING CAPACITIVE LOADS
The internal compensation of the AD825, together with its high
output current drive, permits excellent large signal performance
while driving extremely high capacitive loads.
TEKTRONIX
P6204 FET
PROBE
HP PULSE
GENERATOR
50
RIN
1k
CL
VOUT
VIN
TEKTRONIX
7A24
PREAMP
AD825
7
4
3
6
2
+VS
0.01
F
10
F
–VS
0.01
F
10
F
00876-E
-028
1k
Figure 30. Inverting Amplifier Driving a Capacitive Load
INPUT
OUTPUT
5V
500ns
00876-E
-029
Figure 31. Inverting Amplifier Pulse Response
While Driving a 400 pF Capacitive Load
THEORY OF OPERATION
The AD825 is a low cost, wideband, high performance FET
input operational amplifier. With its unique input stage design,
the AD825 ensures no phase reversal, even for inputs that
exceed the power supply voltages, and its output stage is
designed to drive heavy capacitive or resistive loads with small
changes relative to no load conditions.
The AD825 (Figure 32) consists of common-drain, common-
base FET input stage driving a cascoded, common-base
matched NPN gain stage. The output buffer stage uses emitter
followers in a Class AB amplifier that can deliver large current
to the load while maintaining low levels of distortion.
POS
NEG
VNEG
VPOS
VOUT
CF
00876-E-030
Figure 32. Simplified Schematic
The capacitor, CF, in the output stage, enables the AD825 to
drive heavy capacitive loads. For light loads, the gain of the
output buffer is close to unity, CF is bootstrapped, and not much
happens. As the capacitive load is increased, the gain of the
output buffer is decreased and the bandwidth of the amplifier is
reduced through a portion of CF adding to the dominant pole.
As the capacitive load is further increased, the amplifier’s
bandwidth continues to drop, maintaining the stability of the
AD825.
INPUT CONSIDERATION
The AD825 with its unique input stage ensures no phase
reversal for signals as large as or even larger than the supply
voltages. Also, layout considerations of the input transistors
ensure functionality even with a large differential signal.
The need for a low noise input stage calls for a larger FET
transistor. One should consider the additional capacitance that
is added to ensure stability. When filters are designed with the
AD825, one needs to consider the input capacitance (5 pF to
6 pF) of the AD825 as part of the passive network.
GROUNDING AND BYPASSING
The AD825 is a low input bias current FET amplifier. Its high
frequency response makes it useful in applications, such as
photodiode interfaces, filters, and audio circuits. When
designing high frequency circuits, some special precautions are
in order. Circuits must be built with short interconnects, and
resistances should have low inductive paths to ground. Power
supply leads should be bypassed to common as close as possible
to the amplifier pins. Ceramic capacitors of 0.1 F are
recommended.
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